Come on in, today we are going to talk about ADC inaccuracy
ADCs are used in a wide variety of applications, especially measurement systems that need to process analog sensor signals, such as data acquisition systems that measure pressure, flow, velocity, and temperature… Understanding the total system accuracy for these types of applications is always important in any design, especially those that need to quantify very small sensitivities and changes in the waveform.
Ideally, every volt applied to the input of a signal chain would result in a digital representation of one volt at the output of the ADC. However, this is not the case. All converters and signal chains have a finite amount of error associated with them.
This article shows
how the inaccuracies within the converter accumulate to cause these errors. This is important to understand how to properly specify an ADC when defining system parameters for a new design where measurement accuracy is critical.
First, note that because ADCs are not ideal and have finite resolution, they can only display a finite amount of information representation at their output. The amount of information represented is given by the converter full-scale input divided by 2N, where N is the ideal number of bits of the converter.
Figure 1. ADC quantization error.
For example, if a 12-bit ADC is chosen, it can represent any signal applied to the converter input as 4096 digital representations at its output. These representations do have a finite amount of error. Therefore, if the 12-bit ADC has an input full-scale range (VFS) of 10 V pp, then its ideal LSB size is 2.44 mV pp, with an accuracy of ±1.22 mV.
(Formula 1)
In reality, ADCs are not ideal. There is some noise inside the converter, KT/C, and even at DC. Remember, a 1 kΩ resistor is equivalent to 4 nV∙Hz (1 Hz bandwidth, 25°C). Note that when looking at a 12-bit ADC data sheet, the SNR is typically around 70 dB to 72 dB. However, a 12-bit ADC should ideally have 74 dB, according to the following formula:
(Formula 2)
Therefore, in practice, 12-bit resolution is not achievable due to the inherent inaccuracy of the converter, as shown in Figure 2.
Figure 2. ADC inaccuracy.
These inaccuracies or errors determine how effectively the converter represents the signal that is ultimately received by the signal chain.
Offset error is defined as the analog value at which the transfer function fails to pass through zero. Gain error is the difference in full-scale values between the ideal and actual transfer functions when the offset error is zero. Linearity error or nonlinearity in the more general sense is the deviation from a straight line between zero scale and full scale, as shown in Figure 1.
ADC linearity is only as good as the converter itself, which depends on architecture and process variations. There are many ways to correct for this, but they are expensive. Designers have two choices:
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Buy a better, more expensive converter or correct the linearity digitally, which is also very expensive and means more resources may be needed to specify a DSP or FPGA because linearity will change with temperature and process.
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Depending on the sampling rate, IF, and resolution, digital correction may require extensive characterization and lookup tables to correct or adjust the ADC's performance on the fly.
There are two types of linearity errors: they are differential nonlinearity and integral nonlinearity, commonly referred to as DNL and INL, respectively.
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DNL is defined as any error or deviation from the ideal value. In other words, it represents the deviation of the analog difference of two adjacent codes from the ideal code value VFS/2N. This can be considered as a factor related to the SNR performance of the ADC. As the deviation of the code increases, the number of conversions decreases. This error is bounded to ±0.5 LSB over temperature, which guarantees no missing codes.
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INL is defined as the deviation from the curvature of an ideal straight line approximation between zero scale and full scale. In most cases, INL determines the SFDR performance of the ADC. The shape of the total deviation from INL can determine the most dominant harmonic performance. For example, a bow-shaped INL curve will produce worse even harmonics, while an S-bow-shaped INL curve will generally produce odd harmonics. This error is inherently frequency-dependent and is not relevant to this type of error analysis.
Even if the static offset and gain errors can be eliminated, the temperature coefficients associated with the offset and gain errors will still exist.
For example, a 12-bit ADC has a 10 ppm gain error, or FSR/°C = 0.001%/°C. 1 LSB in a 12-bit system is ¼096, or approximately 0.024%.
Therefore, with a 125°C ∆ (–40°C to +85°C), this yields a ±2.5 LSB gain tempco error, or 0.001% × 125 = 0.125%, where 0.125/0.024 = 5.1, or ±2.55 LSBs.
For the offset temperature coefficient, 5 ppm offset error or FSR/°C = 0.0005%/°C.
This yields a ±1.3 LSB offset tempco error, or 0.0005% × 125 = 0.0625. Here, 0.0625/0.024 = 2.6 or ±1.3 LSB.
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