ADI In-depth: A Detailed Explanation of Galvanically Isolated LVDS Interfaces

LVDS interfaces are often used with control and regulation systems, where large amounts of data must be sent between electronic circuits or across short cables. It also allows very fast distribution of clock signals to different devices in a complete application, thus synchronizing the respective devices. Analog front ends (AFEs) in industrial measurement applications and control systems are typical applications for LVDS. However, it is also often used to implement digital interfaces between multiple data nodes and in the transmission of video signals, for example via HDMI®. Another aspect that should not be overlooked is the possibility of galvanic isolation provided by LVDS circuits. Therefore, it is also used wherever an isolated communication interface is required, for example in electronic circuits or backplanes.

There are already various products on the market for implementing isolated LVDS interfaces. ADI's isolated LVDS family, including the ADN4650, ADN4651, and ADN4652, is a very effective and reliable solution that supports data rates up to 600 Mbps, which also meets the standard values ​​of non-isolated LVDS interfaces. In contrast, standard digital isolators can only reach 150 Mbps. Thanks to iCoupler® technology, this family can still achieve very high data rates despite the isolation. This involves the use of microelectromechanical systems (MEMS) to realize on-chip transformers, which simply isolate digital signals and save space.

The LVDS family also offers ultra-precise timing characteristics and very low jitter (also known as timing jitter). Jitter describes the deviation of the rising and falling edges of a digital signal from an ideal time reference. Low jitter is very important at high data rates, as it takes only 1.6 ns to transmit one bit at 600 Mbps. The requirement for jitter in the rising or falling edge of the signal is that it must give the analog-to-digital converter enough time to reach the actual high or low level so that sampling can be performed correctly.

For the ADN465x family, the jitter is typically 70 ps. The LVDS module also provides two isolated LVDS channels, which form the transmit and receive channels in the ADN4651. The channel arrangement in the ADN4652 is the opposite of that in the ADN4651, with the ADN4650 providing only a transmit or receive channel, depending on the wiring. The ADN465x family operates from an internal 2.5 V supply voltage; unfortunately, industrial systems often do not have this supply voltage and only provide 3.3 V. Therefore, a low dropout regulator (LDO) is integrated in the ADN465x family, whose input accepts an external supply voltage of 3.3 V. The power supply of the module or its input and its isolated output can be achieved using, for example, an isolated ADuM5000 DC-DC converter. This can selectively generate an isolated output voltage of 5 V or 3.3 V with a maximum power output of 500 mW. This circuit configuration is shown in Figure 1.

Figure 1. Isolated LVDS interface using the ADN4651 and ADuM5000.

Together with the ADuM5000, this device family meets many of the requirements for isolated LVDS interfaces in today's industrial applications. This highly integrated solution also meets all prerequisites for standardized bus communication. LVDS interfaces are frequently used in energy-saving applications. For this purpose, the combination of the ADN4651 and the ADuM5000 is an extremely power-saving alternative to conventional optocouplers. It is often necessary to isolate multiple channels simultaneously.

In LVDS applications, channels are used in parallel to maximize the throughput rate and the corresponding baud rate. The circuit described using the above module from Analog Devices provides a four-channel isolator: two transmit channels and two receive channels. Thus, two complete transmit and receive channels on one electronic assembly can simultaneously transmit signals at very high transmission rates.

As long as the requirements for maximum pulse width distortion are met, data rates from DC to 600 Mbps can be easily achieved using the ADN465x family. In addition, some factors related to high-speed transmission of differential signals must be considered in the layout. The input and output side traces should be matched and have an impedance of approximately 50Ω relative to ground, or 100Ω impedance between signal lines. In addition, it is recommended to connect a 100Ω termination resistor at the LVDS input, as shown in Figure 2.

Figure 2. Isolated LVDS wiring circuit using ADN4651.

Cable length and connector type also affect the maximum data rate. Using lower data rates (up to 200 Mbps) combined with connectors that support higher data rates and have shielded pairs, cables can even be several meters long.

The ADN4650/ADN4651/ADN46521 are signal isolated LVDS buffers with data rates up to 600 Mbps and very low jitter. This combination with the ADuM5000 makes it an ideal choice for high speed signal transmission, enabling 600 Mbps over short distances and 200 Mbps over several meters.