Can I use MCU to access non-standard SPI interface?

Some newer ADCs have SPI, but some have non-standard 3-wire or 4-wire SPI as slaves because they want to achieve faster throughput rates. For example, the AD7616, AD7606, and AD7606B families have two or four SDO lines that provide faster throughput rates in serial mode. The AD7768, AD7779 and AD7134 series have multiple S DO lines and are used as SPI masters. Users often encounter difficulties when designing the microcontroller SPI to configure the ADC and read the code.

Figure 1. The AD7768 is used as a serial master with two data output pins (14001-193).

Figure 2. Standard MCU SPI connection to ADC slave.

To start SPI communication, the controller must send a clock signal and select the ADC by enabling the CS signal (usually an active low signal). SPI is a full-duplex interface, so the controller and ADC can output data simultaneously through the MOSI/DIN and MISO/DOUT lines respectively. The controller SPI interface allows the user the flexibility to select the rising or falling edge of the clock to sample and/or shift data. For reliable communication between the master and slave, the user must adhere to the digital interface timing specifications of the microcontroller and ADC chip.

Figure 3. Example of SPI data clock timing diagram.

If the microcontroller SPI and ADC serial interfaces have standard SPI timing modes, it will not be a problem for users to design PCB layout and develop driver firmware. However, some newer ADCs have serial interface ports that are not in typical SPI timing mode. It seems impossible for the MCU or DSP to read the data through the AD7768 serial port (a non-standard timing SPI port) as shown in Figure 4.

Figure 4. AD7768 FORMATx=1× timing diagram, output only through DOUT0.

This article will describe methods of manipulating standard microcontroller SPI to interface with ADCs that have non-standard SPI ports.

This article will give four solutions for reading ADC codes through the serial interface:

• Solution 1: The MCU acts as an SPI slave and interfaces with the ADC as an SPI master through a DOUT line.

• Solution 2: The MCU acts as an SPI slave and interfaces with the ADC as the SPI master through two DOUT lines.

• Solution 3: The MCU acts as an SPI slave and interfaces with the ADC as an SPI master through DMA.

• Solution 4: MCU acts as SPI master and SPI slave and reads data through two DOUT lines.

The STM32Fxxx series of microcontrollers are widely used in many different applications. This MCU has multiple SPI ports and can be configured as an SPI master or slave using typical SPI timing modes. The methods described below can also be applied to other microcontrollers with 8-bit, 16-bit or 32-bit frames.

AD7768/AD7768-4 are 8-channel and 4-channel synchronous sampling Σ-Δ ADCs respectively. Each channel has a Σ-Δ modulator and digital filter, supporting synchronous sampling of AC and DC signals. The devices achieve 108dB dynamic range at a maximum input bandwidth of 110.8kHz, with typical performance of ±2ppm INL, ±50µV offset error, and ±30ppm gain error. AD7768/AD7768-4 users can make tradeoffs between input bandwidth, output data rate, and power consumption and select one of three power modes to optimize noise targets and power consumption. The flexibility of the AD7768/AD7768-4 makes it a reusable platform for low-power DC and high-performance AC measurement modules. Unfortunately, the AD7768's serial interface is not in typical SPI timing mode, and the AD7768 acts as the serial interface master. Generally speaking, users must use FPGA/CPLD as their controller. For example, use the 32F429IDISCOVERY and AD7768 evaluation boards. The alternate SPI line connections are shown in Figure 5. In this setting, all eight channels of AD7768 data are output only through DOUT0.

Figure 5. AD7768 outputs data to STM32F429 MCU SPI connection via DOUT0.

issues that need resolving:

• AD7768 is used as an SPI master, so the STM32F429I SPI must be configured as an SPI slave.

• The DRDY high pulse only lasts for one DCLK cycle, which is not typical CS.

• After completing the output of all channel data bits, DCLK continues to output, and DRDY is low level.

Figure 6. AD7768 data bit reading in timing solution.

Figure 7. Configuring the SPI4 peripheral.

When the software is in interrupt mode, DCLK can run at up to 4 MHz, achieving an ODR of 8 kSPS. Software should enter the interrupt handler and start the SPI within one and a half DCLK cycles (375 ns). To make it easier for software to enter the interrupt routine, the MCU can read data on the rising edge of DCLK, providing an additional half DCLK cycle time. However, the t5 DCLK rise to DOUTx inactive minimum is –3 ns (–4 ns with IOVDD = 1.8 V), so the propagation delay on DOUTx (>|t5| + MCU hold time) should be increased through PCB routing or buffering.

In the first solution, only use DOUT0 to output all 8 channels of data. Therefore, data reading limits the ADC throughput rate to 8 kSPS. As shown in Figure 1, output channel 0 to channel 3 on DOUT0, and output channel 4 to channel 7 on DOUT1, which can reduce data transmission time. The connection of the serial line is shown in Figure 7. With this improvement, the ODR can easily reach 16 kSPS at a DCLK of 4 MHz.

Figure 8. AD7768 outputs data to STM32F429 MCU SPI connection via DOUT0 and DOUT1.

The firmware can use polling mode instead of interrupt mode to reduce the time delay from DRDY rising edge trigger to enabling SPI to receive data. This can achieve an ODR of 32kSPS when DCLK is 8MHz.

Figure 9. EXTI0 is in polling mode with SPI4 and SPI5 receiving AD7768 data bits through DOUT0 and DOUT1.

Direct memory access (DMA) is used to provide high-speed data transfer between peripherals and memory and between memory and memory. DMA can quickly move data without requiring any MCU operations, which frees up MCU resources for other operations. The following is a design description of MCU SPI used as a slave to receive data through DMA.

Figure 10. EXTI0 is in polling mode and the SPI4 DMA receives AD7768 data bits through DOUT0.

High-throughput or multi-channel precision ADCs provide two, four or even eight SDO lines to the SPI port for faster code reading in serial mode. For microcontrollers with two or more SPI ports, these SPI ports can run simultaneously to speed up the reading of code.

In the following use case, 32F429IDISCOVERY uses SPI4 as the SPI master and SPI5 as the SPI slave to receive EVAL-AD7606B-FMCZ data through DOUTA and DO UTB, as shown in Figure 8.

The AD7606B is a 16-bit simultaneous sampling analog-to-digital conversion data acquisition system (DAS) with eight channels, each channel includes analog input clamp protection, programmable gain amplifier (PGA), low-pass filter, and 16-bit sequential Approximation register (SAR) type ADC.

The AD7606B also has built-in flexible digital filters, a low-drift 2.5V precision reference, and a reference buffer to drive the ADC and flexible parallel and serial interfaces. The AD7606B operates from a single 5V supply, supports ±10V, ±5V, and ±2.5V true bipolar input ranges, and can sample at a throughput rate of 800 kSPS on all channels.

Figure 11. Using MCU SPI in master-slave mode to receive data through DOUTA and DOUTB.

Figure 12. SPI4 configured as master and SPI5 configured as slave

Figure 13 shows a screenshot of the digital interface for BUSY, SCLK, DOUTA, and DOUB when the AD7606B is running at 240kSPS.

Figure 13. Oscilloscope screenshot of AD7606B BUSY, SCLK, and data on DOUTA and DOUTB.

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