In order to achieve higher accuracy and quality, we adopted the data acquisition system "combination technology"
However, the overall accuracy is also affected by the input driver of the ADC, which is used to buffer and amplify the input signal. In addition, a bias signal must be added or a fully differential signal must be generated to cover the input voltage range of the ADC and meet its common-mode voltage requirements without changing the original signal in the process. A programmable gain instrumentation amplifier (PGIA) is often used as an input driver. In this article, we propose a combination of input driver and ADC that can achieve very accurate conversion results, thereby building a high-quality data acquisition system.
For example, the LTC6373 is a PGIA suitable for high-precision data acquisition systems. In addition to the fully differential output, it also has high DC precision, low noise, low distortion (see Figure 2), and a high bandwidth of 4 MHz with a gain of 1/4 to 16. The ADC can be driven directly by it, so it is suitable for many signal conditioning applications.
The circuit in Figure 1 shows an example of using the LTC6373 to drive a precision ADC, an AD4020 with 20-bit resolution at 1.8 MSPS.
Figure 1. Example circuit for driving a precision ADC.
In this circuit, the LTC6373 is DC coupled at the input and output, eliminating the need for a transformer to drive the ADC. The gain can be set from 0.25 V/V to 16 V/V via pins A2/A1/A0. In Figure 1, the LTC6373 uses a differential input to differential output configuration with ±15 V symmetrical supply voltages. Alternatively, the input can be single-ended and the output is still differential.
In Figure 1, the output common-mode voltage is set to VREF/2 via the VOCM pin. This enables output level shifting of the LTC6373. Each output of the LTC6373 varies between 0 V and VREF, so there is a differential signal with an amplitude of 2× VREF at the ADC input. The RC network between the output of the LTC6373 and the ADC input forms a single-pole low-pass filter, which reduces the current glitches generated when switching capacitors at the ADC input. At the same time, the low-pass filter limits broadband noise.
Figure 2. SNR (left) and THD (right) performance of the AD4020 driven by the LTC6373.
Figure 2 shows the signal-to-noise ratio (SNR) and total harmonic distortion (THD) of the LTC6373 driving the AD4020 SAR ADC (high-Z mode) over the entire input voltage range (10 V pp). Satisfactory results are obtained at a filter resistor (RFILTER) of 442 Ω at a throughput of 1.8 MSPS. At 1 MSPS or 0.6 MSPS, the manufacturer recommends an RFILTER of 887 Ω.
The LTC6373 can drive most SAR ADCs with differential inputs without the need for an additional ADC driver. However, in some applications, a separate ADC driver can be used between the LTC6373 and the precision ADC to further improve the linearity of the signal chain.
LTC6373
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Programmable Gain Pin:
G = 0.25, 0.5, 1, 2, 4, 8, 16 V / V + Shutdown -
Fully differential output
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Gain error: 0.012% (max)
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Gain Error Drift: 1ppm/°C (max)
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CMRR: 103 dB (minimum), (G = 16)
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Input bias current: 25 pA (max)
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Input offset voltage: 92 μV (max), G = 16
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Input offset voltage drift: 1.7 μV/°C (max), G = 16
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–3 dB bandwidth: 4 MHz, G = 16
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Input noise density: 8 nV/√Hz, G = 16
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Slew rate: 12 V/μs, G = 16
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Adjustable common-mode output voltage
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Quiescent supply current: 4.4 mA
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Supply voltage range: ±4.5 V to ±18 V
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Rated temperature range from –40 °C to 125 °C
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Small 12-lead 4mm × 4mm DFN (LFCSP) package