Mitsubishi microcomputers
M16C / 62A Group
Description
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Description
The M16C/62A group of single-chip microcomputers are built using the high-performance silicon gate
CMOS process using a M16C/60 Series CPU core and are packaged in a 100-pin plastic molded QFP.
These single-chip microcomputers operate using sophisticated instructions featuring a high level of instruc-
tion efficiency. With 1M bytes of address space, they are capable of executing instructions at high speed.
They also feature a built-in multiplier and DMAC, making them ideal for controlling office, communications,
industrial equipment, and other high-speed processing applications.
The M16C/62A group includes a wide range of products with different internal memory types and sizes and
various package types.
Features
• Memory capacity .................................. ROM (See Figure 1.1.4. ROM Expansion)
RAM 3K to 20K bytes
• Shortest instruction execution time ...... 62.5ns (f(X
IN
)=16MH
Z
, V
CC
=5V)
100ns (f(X
IN
)=10MH
Z
, V
CC
=3V, with software one-wait) : Mask ROM, flash memory 5V version
• Supply voltage ..................................... 4.2V to 5.5V (f(X
IN
)=16MH
Z
, without software wait) : Mask ROM, flash memory 5V version
2.7V to 5.5V (f(X
IN
)=10MH
Z
with software one-wait) : Mask ROM, flash memory 5V version
• Low power consumption ...................... 25.5mW ( f(X
IN
)=10MH
Z
, with software one-wait, V
CC
= 3V)
• Interrupts .............................................. 25 internal and 8 external interrupt sources, 4 software
interrupt sources; 7 levels (including key input interrupt)
• Multifunction 16-bit timer ...................... 5 output timers + 6 input timers
• Serial I/O .............................................. 5 channels (3 for UART or clock synchronous, 2 for clock synchro-
nous)
• DMAC .................................................. 2 channels (trigger: 24 sources)
• A-D converter ....................................... 10 bits X 8 channels (Expandable up to 10 channels)
• D-A converter ....................................... 8 bits X 2 channels
• CRC calculation circuit ......................... 1 circuit
• Watchdog timer .................................... 1 line
• Programmable I/O ............................... 87 lines
_______
• Input port .............................................. 1 line (P8
5
shared with NMI pin)
• Memory expansion .............................. Available (to a maximum of 1M bytes)
• Chip select output ................................ 4 lines
• Clock generating circuit ....................... 2 built-in clock generation circuits
(built-in feedback resistor, and external ceramic or quartz oscillator)
Applications
Audio, cameras, office equipment, communications equipment, portable equipment
------Table of Contents------
Central Processing Unit (CPU) ..................... 11
Reset ............................................................. 14
Processor Mode ............................................ 21
Clock Generating Circuit ............................... 35
Protection ...................................................... 44
Interrupts ....................................................... 45
Watchdog Timer ............................................ 65
DMAC ........................................................... 67
Timer ............................................................. 77
Serial I/O ..................................................... 107
A-D Converter ............................................. 148
D-A Converter ............................................. 158
CRC Calculation Circuit .............................. 160
Programmable I/O Ports ............................. 162
Electrical characteristic ............................... 173
Flash memory version ................................. 216
1
Mitsubishi microcomputers
M16C / 62A Group
Description
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Performance Outline
Table 1.1.1 is a performance outline of M16C/62A group.
Table 1.1.1. Performance outline of M16C/62A group
Item
Number of basic instructions
Shortest instruction execution time
Performance
91 instructions
62.5ns(f(X
IN
)=16MH
Z
, V
CC
=5V)
100ns (f(X
IN
)=10MH
Z
, V
CC
=3V, with software one-wait)
: Mask ROM, flash memory 5V version
(See the figure 1.1.4. ROM Expansion)
3K to 20K bytes
8 bits x 10, 7 bits x 1
Memory
capacity
I/O port
ROM
RAM
P0 to P10 (except P8
5
)
Input port
P8
5
1 bit x 1
Multifunction TA0, TA1, TA2, TA3, TA4
16 bits x 5
timer
TB0, TB1, TB2, TB3, TB4, TB5 16 bits x 6
Serial I/O
UART0, UART1, UART2
SI/O3, SI/O4
A-D converter
D-A converter
DMAC
CRC calculation circuit
Watchdog timer
Interrupt
Clock generating circuit
Supply voltage
(UART or clock synchronous) x 3
(Clock synchronous) x 2
10 bits x (8 + 2) channels
8 bits x 2
2 channels (trigger: 24 sources)
CRC-CCITT
15 bits x 1 (with prescaler)
25 internal and 8 external sources, 4 software sources, 7 levels
2 built-in clock generation circuits
(built-in feedback resistor, and external ceramic or quartz oscillator)
4.2V to 5.5V (f(X
IN
)=16MH
Z
, without software wait)
: Mask ROM, flash memory 5V version
2.7V to 5.5V (f(X
IN
)=10MH
Z
with software one-wait)
: Mask ROM, flash memory 5V version
25.5mW (f(X
IN
) = 10MH
Z
, V
CC
=3V with software one-wait)
5V
5mA
Available (to a maximum of 1M bytes)
CMOS high performance silicon gate
100-pin plastic mold QFP
Power consumption
I/O
I/O withstand voltage
characteristics Output current
Memory expansion
Device configuration
Package
5