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IS62WV12816EALL-55TLI

Description
Standard SRAM, 128KX16, 55ns, CMOS, PDSO44, TSOP2-44
Categorystorage    storage   
File Size647KB,17 Pages
ManufacturerIntegrated Silicon Solution ( ISSI )
Environmental Compliance
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IS62WV12816EALL-55TLI Overview

Standard SRAM, 128KX16, 55ns, CMOS, PDSO44, TSOP2-44

IS62WV12816EALL-55TLI Parametric

Parameter NameAttribute value
Is it Rohs certified?conform to
MakerIntegrated Silicon Solution ( ISSI )
package instructionTSOP2,
Reach Compliance Codecompliant
Factory Lead Time8 weeks
Maximum access time55 ns
JESD-30 codeR-PDSO-G44
length18.41 mm
memory density2097152 bit
Memory IC TypeSTANDARD SRAM
memory width16
Number of functions1
Number of terminals44
word count131072 words
character code128000
Operating modeASYNCHRONOUS
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
organize128KX16
Package body materialPLASTIC/EPOXY
encapsulated codeTSOP2
Package shapeRECTANGULAR
Package formSMALL OUTLINE, THIN PROFILE
Parallel/SerialPARALLEL
Peak Reflow Temperature (Celsius)NOT SPECIFIED
Maximum seat height1.2 mm
Maximum supply voltage (Vsup)2.2 V
Minimum supply voltage (Vsup)1.65 V
Nominal supply voltage (Vsup)1.8 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal formGULL WING
Terminal pitch0.8 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
width10.16 mm
IS62WV12816EALL
IS62/65WV12816EBLL
128Kx16 LOW VOLTAGE,
ULTRA LOW POWER CMOS STATIC RAM
KEY FEATURES
High-speed access time: 45ns, 55ns
CMOS low power operation
– Operating Current: 18 mA (max) at 85°C
– CMOS Standby Current: 5.4uA (typ) at 25°C
TTL compatible interface levels
Single power supply
–1.65V-2.2V V
DD
(IS62WV12816EALL)
– 2.2V-3.6V V
DD
(IS62/65WV12816EBLL)
Three state outputs
Industrial and Automotive temperature support
Lead-free available
MAY 2017
DESCRIPTION
The
ISSI
IS62/65WV12816EALL/EBLL are high-speed, 2M
bit static RAMs organized as 128K words by 16 bits. It is
fabricated using
ISSI's
high-performance CMOS technology.
This highly reliable process coupled with innovative circuit
design techniques, yields high-performance and low power
consumption devices.
When CS1# is HIGH
(deselected) or when CS2 is LOW
(deselected) or when
CS1# is LOW,
CS2 is HIGH and
both
LB# and UB# are HIGH,
the device assumes a standby
mode at which the power dissipation can be reduced down
with CMOS input levels.
Easy memory expansion is provided by using Chip Enable
and Output Enable inputs. The active LOW Write Enable
(WE#) controls both writing and reading of the memory. A
data byte allows Upper Byte (UB#) and Lower Byte (LB#)
access.
The IS62/65WV12816EALL/EBLL are packaged in the
JEDEC standard 48-pin mini BGA (6mm x 8mm) and 44-Pin
TSOP (TYPE II)
BLOCK DIAGRAM
128K x 16
MEMORY
ARRAY
A0 – A16
DECODER
VDD
GND
I/O0 – I/O7
Lower Byte
I/O8 – I/O15
Upper Byte
CS2
CS1#
OE#
WE#
UB#
LB#
I/O
DATA
CIRCUIT
COLUMN I/O
CONTROL
CIRCUIT
Copyright © 2017 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time
without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to
obtain the latest version of this device specification before relying on any published information and before placing orders for products.
Integrated Silicon Solution, Inc. does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can
reasonably be expected to cause failure of the life support system or to significantly affect its safety or effectiveness. Products are not authorized for use in such
applications unless Integrated Silicon Solution, Inc. receives written assurance to its satisfaction, that:
a.) the risk of injury or damage has been minimized;
b.) the user assume all such risks; and
c.) potential liability of Integrated Silicon Solution, Inc is adequately protected under the circumstances
Integrated Silicon Solution, Inc.-
www.issi.com
Rev. C2
05/24/2017
1

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IS62WV12816EALL-55TLI IS62WV12816EBLL-45TLI IS62WV12816EBLL-45BLI IS62WV12816EALL-55BLI IS62WV12816EBLL-45TLI-TR IS62WV12816EALL-55BLI-TR
Description Standard SRAM, 128KX16, 55ns, CMOS, PDSO44, TSOP2-44 Standard SRAM, 128KX16, 45ns, CMOS, PDSO44, 0.400 INCH, LEAD FREE, TSOP2-44 Standard SRAM, 128KX16, 45ns, CMOS, PBGA48, 6 X 8 MM, LEAD FREE, MO-207, MINI BGA-48 Standard SRAM, 128KX16, 55ns, CMOS, PBGA48, 6 X 8 MM, LEAD FREE, MO-207, MINI BGA-48 IC SRAM 2MBIT 45NS 44TSOP Standard SRAM,
Is it Rohs certified? conform to conform to conform to conform to conform to conform to
package instruction TSOP2, TSOP2, TFBGA, 6 X 8 MM, LEAD FREE, MO-207, MINI BGA-48 TSOP2, TFBGA,
Reach Compliance Code compliant compli compli compliant compliant compliant
Factory Lead Time 8 weeks 8 weeks 8 weeks 8 weeks 8 weeks 8 weeks
Maximum access time 55 ns 45 ns 45 ns 55 ns 45 ns 55 ns
JESD-30 code R-PDSO-G44 R-PDSO-G44 R-PBGA-B48 R-PBGA-B48 R-PDSO-G44 R-PBGA-B48
length 18.41 mm 18.41 mm 8 mm 8 mm 18.41 mm 8 mm
memory density 2097152 bit 2097152 bi 2097152 bi 2097152 bit 2097152 bit 2097152 bit
Memory IC Type STANDARD SRAM STANDARD SRAM STANDARD SRAM STANDARD SRAM STANDARD SRAM STANDARD SRAM
memory width 16 16 16 16 16 16
Number of functions 1 1 1 1 1 1
Number of terminals 44 44 48 48 44 48
word count 131072 words 131072 words 131072 words 131072 words 131072 words 131072 words
character code 128000 128000 128000 128000 128000 128000
Operating mode ASYNCHRONOUS ASYNCHRONOUS ASYNCHRONOUS ASYNCHRONOUS ASYNCHRONOUS ASYNCHRONOUS
Maximum operating temperature 85 °C 85 °C 85 °C 85 °C 85 °C 85 °C
Minimum operating temperature -40 °C -40 °C -40 °C -40 °C -40 °C -40 °C
organize 128KX16 128KX16 128KX16 128KX16 128KX16 128KX16
Package body material PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code TSOP2 TSOP2 TFBGA TFBGA TSOP2 TFBGA
Package shape RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR
Package form SMALL OUTLINE, THIN PROFILE SMALL OUTLINE, THIN PROFILE GRID ARRAY, THIN PROFILE, FINE PITCH GRID ARRAY, THIN PROFILE, FINE PITCH SMALL OUTLINE, THIN PROFILE GRID ARRAY, THIN PROFILE, FINE PITCH
Parallel/Serial PARALLEL PARALLEL PARALLEL PARALLEL PARALLEL PARALLEL
Peak Reflow Temperature (Celsius) NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED
Maximum seat height 1.2 mm 1.2 mm 1.2 mm 1.2 mm 1.2 mm 1.2 mm
Maximum supply voltage (Vsup) 2.2 V 3.6 V 3.6 V 2.2 V 3.6 V 2.2 V
Minimum supply voltage (Vsup) 1.65 V 2.2 V 2.2 V 1.65 V 2.2 V 1.65 V
surface mount YES YES YES YES YES YES
technology CMOS CMOS CMOS CMOS CMOS CMOS
Temperature level INDUSTRIAL INDUSTRIAL INDUSTRIAL INDUSTRIAL INDUSTRIAL INDUSTRIAL
Terminal form GULL WING GULL WING BALL BALL GULL WING BALL
Terminal pitch 0.8 mm 0.8 mm 0.75 mm 0.75 mm 0.8 mm 0.75 mm
Terminal location DUAL DUAL BOTTOM BOTTOM DUAL BOTTOM
Maximum time at peak reflow temperature NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED
width 10.16 mm 10.16 mm 6 mm 6 mm 10.16 mm 6 mm
Maker Integrated Silicon Solution ( ISSI ) - - Integrated Silicon Solution ( ISSI ) Integrated Silicon Solution ( ISSI ) Integrated Silicon Solution ( ISSI )
Nominal supply voltage (Vsup) 1.8 V 3 V 3 V - 3 V 1.8 V
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