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ADT7490ARQZ-RL7U1

Description
SPECIALTY ANALOG CIRCUIT, PDSO24, ROHS COMPLIANT, MO-137AE, QSOP-24
CategoryAnalog mixed-signal IC    The signal circuit   
File Size724KB,75 Pages
ManufacturerON Semiconductor
Websitehttp://www.onsemi.cn
Download Datasheet Parametric View All

ADT7490ARQZ-RL7U1 Overview

SPECIALTY ANALOG CIRCUIT, PDSO24, ROHS COMPLIANT, MO-137AE, QSOP-24

ADT7490ARQZ-RL7U1 Parametric

Parameter NameAttribute value
MakerON Semiconductor
Parts packaging codeSSOP
package instructionSSOP,
Contacts24
Reach Compliance Codeunknown
Analog Integrated Circuits - Other TypesANALOG CIRCUIT
JESD-30 codeR-PDSO-G24
length8.6614 mm
Number of functions1
Number of terminals24
Maximum operating temperature125 °C
Minimum operating temperature-40 °C
Package body materialPLASTIC/EPOXY
encapsulated codeSSOP
Package shapeRECTANGULAR
Package formSMALL OUTLINE, SHRINK PITCH
Certification statusNot Qualified
Maximum seat height1.7526 mm
Maximum supply voltage (Vsup)3.6 V
Minimum supply voltage (Vsup)3 V
Nominal supply voltage (Vsup)3.3 V
surface mountYES
Temperature levelAUTOMOTIVE
Terminal formGULL WING
Terminal pitch0.635 mm
Terminal locationDUAL
width3.9116 mm

ADT7490ARQZ-RL7U1 Preview

ADT7490
Remote Thermal Monitor
and Fan Controller with
PECI Interface
The ADT7490 is a thermal monitor and multiple PWM fan
controller for noise-sensitive or power-sensitive applications requiring
active system cooling. The ADT7490 includes a local temperature
sensor, two remote temperature sensors including series resistance
cancellation, and monitors CPU temperature with a PECI interface.
The ADT7490 can drive a fan using either a low or high frequency
drive signal, and measure and control the speed of up to four fans so
they operate at the lowest possible speed for minimum acoustic noise.
The automatic fan speed control loop optimizes fan speed
for a given temperature using the PECI, remote, or local temperature
information. The effectiveness of the system’s thermal solution can be
monitored using the THERM input. The ADT7490 also provides
critical thermal protection to the system using the bidirectional
THERM/SMBALERT pin as an output to prevent system or
component overheating.
Features
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QSOP−24 NB
CASE 492B
PIN ASSIGNMENT
SDA
SCL
GND
V
CC
GPIO1
GPIO2
PECI
V
TT
1
2
3
4
5
6
7
8
24
PWM1/XTO
23
V
CCP
22
+2.5V
IN
/THERM
21
+12V
IN
20
+5V
IN
Temperature Measurement
1 Local On-Chip Temperature Sensor
2 Remote Temperature Sensors
3 Current External Temperature Sensors with Series Resistance
Cancellation (SRC)
PECI Interface for CPU Thermal Information and Support of Up
to 4 PECI Inputs on 1 Pin
Fan Drive and Fan Speed Control
3 High Frequency or Low Frequency PWM Outputs for Use with
3-wire or 4-wire Fans
4 TACH Inputs to Measure Fan Speed
OS Independent Automatic Fan Speed Control Based on Thermal
Information
Dynamic T
MIN
Control Mode to Optimize System Acoustics
Default Startup at 100% PWM for All Fans for Robust Operation
Bidirectional THERM/SMBALERT Pin to Flag Out-of-Limit and
Overtemperature Conditions
GPIO Functionality to Support Extra Features
Can be Used for Loadline Setting for Voltage Regulation, LED
Control, or Other Functions
I
MON
Monitoring for CPU Current and Power Information
Footprint and Register Compatible with ADT7473/ADT7475/
ADT7476/ADT7476A Family of Fan Controllers
SMBus Interface with Addressing Capability for Up to 3 Devices
ADT7490
19
I
MON
18
D1+
17
D1−
16
D2+
15
D2−
14
*
13
PWM3/ADDREN
TACH3
9
PWM2/
10
SMBALERT
TACH1
11
TACH2
12
*TACH4/THERM/SMBALERT/ADDR SELECT
MARKING DIAGRAMS
1
ADT7490
ARQZ
#DateCode
Assembly Lot
TOP MARKING
BOTTOM MARKING
# = Pb-Free Package
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 74 of this data sheet.
Applications
Personal Computers
Servers
Semiconductor Components Industries, LLC, 2012
July, 2012
Rev. 5
1
Publication Order Number:
ADT7490/D
ADT7490
ADDR SELECT
SCL
SDA
ADT7490
SMBus
ADDRESS
SELECTION
GPIO1
GPIO2
THERM/
SMBALERT
GPIO
REGISTER
PERFORMANCE
MONITORING
THERMAL
PROTECTION
TACH1
TACH2
TACH3
TACH4
PWM1
PWM2
PWM3
PECI
V
TT
V
CC
V
CCP
+12V
IN
+5V
IN
+2.5V
IN
I
MON
D1+
D1−
D2+
D2−
BAND GAP
TEMP. SENSOR
INPUT
SIGNAL
CONDITIONING
AND
ANALOG
MULTIPLEXER
PWM REGISTERS
AND CONTROLLERS
(HF AND LF)
ACOUSTIC
ENHANCEMENT
PECI
INTERFACE
FAN SPEED
COUNTER
AUTOMATIC
FAN SPEED
CONTROL
DYNAMIC T
MIN
CONTROL
SERIAL BUS
INTERFACE
ADDRESS
POINTER
REGISTER
PWM
CONFIGURATION
REGISTERS
INTERRUPT
MASKING
ACOUSTIC
ENHANCEMENT
CONTROL
10-BIT
ADC
INTERRUPT
STATUS
REGISTERS
LIMIT
COMPARATORS
VALUE AND
LIMIT
REGISTERS
BAND GAP
REFERENCE
GND
Figure 1. Functional Block Diagram
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2
ADT7490
Table 1. ABSOLUTE MAXIMUM RATINGS
Parameter
Positive Supply Voltage (V
CC
)
Maximum Voltage on +12 V
IN
Pin
Maximum Voltage on +5 V
IN
Pin
Maximum Voltage on All Open-drain Outputs (excluding PWM pins)
Maximum Voltage on TACHx/PWMx Pins
Voltage on Remaining Input or Output Pins
Input Current at Any Pin
Package Input Current
Maximum Junction Temperature (T
J MAX
)
Storage Temperature Range
Lead Temperature, Soldering
IR Reflow Peak Temperature
Pb-Free Peak Temperature
Lead Temperature (Soldering, 10 sec)
ESD Rating
HBM
FICDM
Rating
3.6
16
6.25
3.6
+5.5
−0.3
to +4.2
5
20
150
−65
to +150
220
260
300
2
0.5
Unit
V
V
V
V
V
V
mA
mA
C
C
C
kV
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
NOTE: This device is ESD sensitive. Use standard ESD precautions when handling.
Table 2. THERMAL CHARACTERISTICS
(Note 1)
Package Type
24-lead QSOP
q
JA
122
q
JC
31.25
Unit
C/W
1.
q
JA
is specified for the worst-case conditions, that is, a device soldered in a circuit board for surface-mount packages.
Table 3. ELECTRICAL CHARACTERISTICS
(T
A
= T
MIN
to T
MAX
, V
CC
= V
MIN
to V
MAX
, unless otherwise noted) (Note 1)
Parameter
Power Supply
Supply Voltage
Supply Current, I
CC
Temperature-to-Digital Converter
Local Sensor Accuracy
Resolution
Remote Diode Sensor Accuracy
0C
T
A
85C
−40C
T
A
+125C
0C
T
A
85C
−40C
T
A
+125C
Mid Level
Low Level
High Level
The ADT7490 Cancels Up to 2 kW in
Series with the Remote Thermal Sensor
0.5
0.25
0.5
0.25
12
72
192
1.5
2.5
1.5
2.5
1.5
C
Interface Inactive, ADC Active
3.0
3.3
1.5
3.6
5.0
V
mA
Conditions
Min
Typ
Max
Unit
C
Remote Sensor Source Current
mA
Series Resistance Cancellation
(Note 2)
kW
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3
ADT7490
Table 3. ELECTRICAL CHARACTERISTICS
(continued)
(T
A
= T
MIN
to T
MAX
, V
CC
= V
MIN
to V
MAX
, unless otherwise noted) (Note 1)
Parameter
Total Unadjusted Error (TUE)
Conditions
For All Channels:
−40C
T
A
+125C
For All Other Channels Except +12 V
IN
:
0C
T
A
+125C
8 Bits
Averaging Enabled, All Channels
Excluding V
TT
(Note 3)
Averaging Enabled
Averaging Enabled
Averaging Enabled
Averaging Enabled
Averaging disabled
For +12 V
IN
Channel
For All Other Channels
0C
T
A
85C
−40C
T
A
+125C
Fan Count = 0xBFFF
Fan Count = 0x3FFF
Fan Count = 0x0438
Fan Count = 0x021C
Min
Typ
0.1
Max
2
1.5
1
Unit
%
Analog-to-Digital Converter (Including MUX and Attentuators)
Differential Non-linearity (DNL)
Power Supply Sensitivity
Conversion Times (Note 2)
Voltage Inputs
V
TT
Voltage Input (Note 3)
Local Temperature
Remote Temperature
Total Monitoring Cycle Time
Input Resistance
Fan RPM-to-Digital Converter
Accuracy
Full-scale Count
Nominal Input RPM
LSB
%/V
ms
150
70
11
12
12
38
169
19
200
100
109
329
5,000
10,000
0.1
0.1
500
13
14
14
43
193
ms
kW
10
14
65,535
8.0
0.4
20
0.4
1.0
0.8
1.26
0.5
V
TT
(Note 3)
6.0
1.0
%
RPM
Open-Drain Digital Outputs, PWM1 TO PWM3, XTO
Current Sink, I
OL
Output Low Voltage, V
OL
High Level Output Current, I
OH
Output Low Voltage, V
OL
High Level Output Current, I
OH
SMBus Digital Inputs (SCL, SDA)
Input High Voltage, V
IH
Input Low Voltage, V
IL
Hysteresis
Digital I/O (PECI Pin)
(Note 2)
V
TT
, Supply Voltage
Input High Voltage, V
IH
Input Low Voltage, V
IL
Hysteresis (Note 2)
High Level Output Source Current,
I
SOURCE
Low Level Output Sink Current, I
SINK
Signal Noise Immunity, V
NOISE
Hysteresis between Input Switching
Levels
V
OH
= 0.75
V
TT
V
OL
= 0.25
V
TT
Noise Glitches from 10 MHz to
100 MHz, Width Up to 50 ns
0.95
0.55
V
TT
(Note 3)
0.1
V
TT
(Note 3)
0.5
300
V
V
V
mV
mA
mA
mV
p-p
2.0
V
V
mV
I
OUT
=
−8.0
mA
V
OUT
= V
CC
I
OUT
=
−4.0
mA
V
OUT
= V
CC
mA
V
mA
V
mA
Open-Drain Serial Data Bus Output (SDA)
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4
ADT7490
Table 3. ELECTRICAL CHARACTERISTICS
(continued)
(T
A
= T
MIN
to T
MAX
, V
CC
= V
MIN
to V
MAX
, unless otherwise noted) (Note 1)
Parameter
Digital Input Logic Levels (TACH1 to TACH3)
Input High Voltage, V
IH
Input Low Voltage, V
IL
Hysteresis
Digital Input Logic Levels (THERM)
Input High Voltage, V
IH
Input Low Voltage, V
IL
Digital Input Current
Input High Current, I
IH
Input Low Current, I
IL
Input Capacitance, C
IN
Serial Bus Timing
(Note 2) (See Figure 2)
Clock Frequency, f
SCLK
Glitch Immunity, t
SW
Bus Free Time, t
BUF
SCL Low Time, t
LOW
SCL High Time, t
HIGH
SCL, SDA Rise Time, t
r
SCL, SDA Fall Time, t
f
Data Setup Time, t
SU;DAT
Detect Clock Low Timeout, t
TIMEOUT
Can be Optionally Disabled
10
4.7
4.7
4.0
250
15
400
50
50
1,000
300
35
kHz
ns
ms
ms
ms
ns
ms
ns
ms
V
IN
= V
CC
V
IN
= 0
1
1
5.0
mA
mA
pF
0.75
V
CCP
0.4
V
V
Maximum Input Voltage
Minimum Input Voltage
2.0
−0.3
0.5
5.5
0.8
V
V
V p-p
Conditions
Min
Typ
Max
Unit
1. All voltages are measured with respect to GND, unless otherwise specified. Typical voltages are T
A
= 25C and represent a parametric norm.
Logic inputs accept input high voltages up to V
MAX
, even when the device is operating down to V
MIN
. Timing specifications are tested at logic
levels of V
IL
= 0.8 V for a falling edge, and V
IH
= 2.0 V for a rising edge.
2. Guaranteed by design, not production tested.
3. V
TT
is the voltage input on Pin 8. The V
TT
voltage is determined by the processor installed on the system.
t
LOW
SCL
t
F
t
R
t
HD; STA
t
HD; STA
t
HD; DAT
t
HIGH
t
SU; DAT
t
SU; STA
t
SU; STO
SDA
P
t
BUF
S
S
P
Figure 2. Serial Bus Timing Diagram
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