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IRHNA57260SESCS

Description
Power Field-Effect Transistor, 55A I(D), 200V, 0.04ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, HERMETIC SEALED, CERAMIC, SMD2, 3 PIN
CategoryThe transistor   
File Size123KB,8 Pages
ManufacturerInfineon
Websitehttp://www.infineon.com/
Download Datasheet Parametric Compare View All

IRHNA57260SESCS Overview

Power Field-Effect Transistor, 55A I(D), 200V, 0.04ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, HERMETIC SEALED, CERAMIC, SMD2, 3 PIN

IRHNA57260SESCS Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerInfineon
package instructionHERMETIC SEALED, CERAMIC, SMD2, 3 PIN
Reach Compliance Codecompliant
ECCN codeEAR99
Is SamacsysN
Avalanche Energy Efficiency Rating (Eas)380 mJ
Shell connectionDRAIN
ConfigurationSINGLE WITH BUILT-IN DIODE
Minimum drain-source breakdown voltage200 V
Maximum drain current (ID)55 A
Maximum drain-source on-resistance0.04 Ω
FET technologyMETAL-OXIDE SEMICONDUCTOR
JESD-30 codeR-CBCC-N3
JESD-609 codee0
Number of components1
Number of terminals3
Operating modeENHANCEMENT MODE
Package body materialCERAMIC, METAL-SEALED COFIRED
Package shapeRECTANGULAR
Package formCHIP CARRIER
Peak Reflow Temperature (Celsius)NOT SPECIFIED
Polarity/channel typeN-CHANNEL
Maximum pulsed drain current (IDM)220 A
Certification statusNot Qualified
surface mountYES
Terminal surfaceTIN LEAD
Terminal formNO LEAD
Terminal locationBOTTOM
Maximum time at peak reflow temperatureNOT SPECIFIED
transistor applicationsSWITCHING
Transistor component materialsSILICON
Base Number Matches1

IRHNA57260SESCS Related Products

IRHNA57260SESCS
Description Power Field-Effect Transistor, 55A I(D), 200V, 0.04ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, HERMETIC SEALED, CERAMIC, SMD2, 3 PIN
Is it Rohs certified? incompatible
Maker Infineon
package instruction HERMETIC SEALED, CERAMIC, SMD2, 3 PIN
Reach Compliance Code compliant
ECCN code EAR99
Is Samacsys N
Avalanche Energy Efficiency Rating (Eas) 380 mJ
Shell connection DRAIN
Configuration SINGLE WITH BUILT-IN DIODE
Minimum drain-source breakdown voltage 200 V
Maximum drain current (ID) 55 A
Maximum drain-source on-resistance 0.04 Ω
FET technology METAL-OXIDE SEMICONDUCTOR
JESD-30 code R-CBCC-N3
JESD-609 code e0
Number of components 1
Number of terminals 3
Operating mode ENHANCEMENT MODE
Package body material CERAMIC, METAL-SEALED COFIRED
Package shape RECTANGULAR
Package form CHIP CARRIER
Peak Reflow Temperature (Celsius) NOT SPECIFIED
Polarity/channel type N-CHANNEL
Maximum pulsed drain current (IDM) 220 A
Certification status Not Qualified
surface mount YES
Terminal surface TIN LEAD
Terminal form NO LEAD
Terminal location BOTTOM
Maximum time at peak reflow temperature NOT SPECIFIED
transistor applications SWITCHING
Transistor component materials SILICON
Base Number Matches 1
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