Typical values represent average readings at 25°C, V
DD
= 5 V, V
SS
= 0 V, and V
LOGIC
= 5 V.
R-INL is the deviation from an ideal value measured between the maximum resistance and the minimum resistance wiper positions. R-DNL measures the relative step
change from ideal between successive tap positions. The maximum wiper current is limited to 0.8 × V
DD
/R
AB
.
3
Guaranteed by design and characterization; not subject to production test.
4
INL and DNL are measured at V
WB
with the RDAC configured as a potentiometer divider similar to a voltage output DAC. V
A
= V
DD
and V
B
= 0 V. DNL specification limits
of ±1 LSB maximum are guaranteed monotonic operating conditions.
5
Resistor Terminal A, Resistor Terminal B, and Resistor Terminal W have no limitations on current direction with respect to each other.
6
C
A
is measured with V
W
= V
A
= 2.5 V, C
B
is measured with V
W
= V
B
= 2.5 V, and C
W
is measured with V
A
= V
B
= 2.5 V.
7
Different from operating current; supply current for NVM program lasts approximately 30 ms.
8
Different from operating current; supply current for NVM read lasts approximately 20 µs.
9
P
DISS
is calculated from (I
DD
× V
DD
).
10
All dynamic characteristics use V
DD
= 5.5 V and V
LOGIC
= 5 V.
11
Endurance is qualified at 100,000 cycles per JEDEC Standard 22, Method A117 and measured at 150°C.
12
Retention lifetime equivalent at junction temperature (T
J
) is 125°C per JEDEC Standard 22, Method A117. Retention lifetime based on an activation energy of 1 eV
derates with junction temperature in the Flash/EE memory.
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