STM32G483xE
Arm
®
Cortex
®
-M4 32-bit MCU+FPU, up to 512 KB Flash, 170 MHz /
213 DMIPS, 128 KB SRAM, rich analog, math accelerator, AES
Datasheet
-
production data
Features
Includes ST state-of-the-art patented
technology
•
Core: Arm
®
32-bit Cortex
®
-M4 CPU with FPU,
Adaptive real-time accelerator (ART
Accelerator) allowing 0-wait-state execution
from Flash memory, frequency up to 170 MHz
with 213 DMIPS, MPU, DSP instructions
•
Operating conditions:
– V
DD
, V
DDA
voltage range:
1.71 V to 3.6 V
•
Mathematical hardware accelerators
– CORDIC for trigonometric functions
acceleration
– FMAC: filter mathematical accelerator
•
Memories
– 512 Kbytes of Flash memory with ECC
support, two banks read-while-write,
proprietary code readout protection
(PCROP), securable memory area, 1 Kbyte
OTP
– 96 Kbytes of SRAM, with hardware parity
check implemented on the first 32 Kbytes
– Routine booster: 32 Kbytes of SRAM on
instruction and data bus, with hardware
parity check (CCM SRAM)
– External memory interface for static
memories FSMC supporting SRAM,
PSRAM, NOR and NAND memories
– Quad-SPI memory interface
•
Reset and supply management
– Power-on/power-down reset
(POR/PDR/BOR)
– Programmable voltage detector (PVD)
– Low-power modes: sleep, stop, standby
and shutdown
– V
BAT
supply for RTC and backup registers
LQFP48 (7 x 7 mm)
LQFP64 (10 x 10 mm)
LQFP80 (12 x 12 mm)
LQFP100 (14 x 14 mm)
LQFP128 (14 x 14 mm)
UFQFPN48
(7 x 7 mm)
WLCSP81
(4.02 x 4.27 mm)
UFBGA121
(6 x 6 mm)
TFBGA100
(8 x 8 mm)
•
Clock management
– 4
to
48 MHz crystal oscillator
– 32 kHz oscillator with calibration
– Internal 16 MHz RC with PLL option (± 1%)
–
Internal
32 kHz RC oscillator (± 5%)
•
Up to 107 fast I/Os
– All mappable on external interrupt vectors
– Several I/Os with 5 V tolerant capability
•
Interconnect matrix
•
16-channel DMA controller
•
5 x 12-bit ADCs 0.25 µs, up to 42 channels.
Resolution up to 16-bit with hardware
oversampling, 0 to 3.6 V conversion range
•
7 x 12-bit DAC channels
– 3 x buffered external channels 1 MSPS
– 4 x unbuffered internal channels 15 MSPS
•
7 x ultra-fast rail-to-rail analog comparators
•
6 x operational amplifiers that can be used in
PGA mode, all terminals accessible
•
Internal voltage reference buffer (VREFBUF)
supporting three output voltages (2.048 V,
2.5 V, 2.9 V)
•
17 timers:
– 2 x 32-bit timer and 2 x 16-bit timers with
up to four IC/OC/PWM or pulse counter
and quadrature (incremental) encoder input
– 3 x 16-bit 8-channel advanced motor
control timers, with up to 8 x PWM
1/230
www.st.com
November 2021
This is information on a product in full production.
DS12997 Rev 4
STM32G483xE
channels, dead time generation and
emergency stop
1 x 16-bit timer with 2 x IC/OCs, one
OCN/PWM, dead time generation and
emergency stop
2 x 16-bit timers with IC/OC/OCN/PWM,
dead time generation and emergency stop
2 x watchdog timers (independent, window)
1 x SysTick timer: 24-bit downcounter
2 x 16-bit basic timers
1 x low-power timer
– 5 x USART/UARTs (ISO 7816 interface,
LIN, IrDA, modem control)
– 1 x LPUART
– 4 x SPIs, 4 to 16 programmable bit frames,
2 x with multiplexed half duplex I
2
S
interface
– 1 x SAI (serial audio interface)
– USB 2.0 full-speed interface with LPM and
BCD support
– IRTIM (infrared interface)
– USB Type-C™ /USB power delivery
controller (UCPD)
•
True random number generator (RNG)
•
CRC calculation unit, 96-bit unique ID
•
AES: 128/256-bit key encryption hardware
accelerator
•
Development support: serial wire debug
(SWD), JTAG, Embedded Trace Macrocell™
–
–
–
–
–
–
•
Calendar RTC with alarm, periodic wakeup
from stop/standby
•
Communication interfaces
– 3 x FDCAN controller supporting flexible
data rate
– 4 x I
2
C Fast mode plus (1 Mbit/s) with
20 mA current sink, SMBus/PMBus,
wakeup from stop
Reference
STM32G483xE
Table 1. Device summary
Part number
STM32G483CE, STM32G483RE, STM32G483ME,
STM32G483PE, STM32G483VE, STM32G483QE
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STM32G483xE
Contents
Contents
1
2
3
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Functional overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
3.1
3.2
3.3
3.4
3.5
3.6
3.7
3.8
3.9
3.10
3.11
Arm
®
Cortex
®
-M4 core with FPU . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Adaptive real-time memory accelerator (ART accelerator) . . . . . . . . . . . 17
Memory protection unit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Embedded Flash memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Embedded SRAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Multi-AHB bus matrix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Boot modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
CORDIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Filter mathematical accelerator (FMAC) . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Cyclic redundancy check calculation unit (CRC) . . . . . . . . . . . . . . . . . . . 21
Power supply management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
3.11.1
3.11.2
3.11.3
3.11.4
3.11.5
3.11.6
Power supply schemes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Power supply supervisor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Voltage regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Low-power modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Reset mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
VBAT operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
3.12
3.13
3.14
3.15
3.16
3.17
Interconnect matrix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Clocks and startup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
General-purpose inputs/outputs (GPIOs) . . . . . . . . . . . . . . . . . . . . . . . . . 28
Direct memory access controller (DMA) . . . . . . . . . . . . . . . . . . . . . . . . . . 28
DMA request router (DMAMUX) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Interrupts and events . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
3.17.1
3.17.2
Nested vectored interrupt controller (NVIC) . . . . . . . . . . . . . . . . . . . . . . 29
Extended interrupt/event controller (EXTI) . . . . . . . . . . . . . . . . . . . . . . 29
Temperature sensor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
3.18
Analog-to-digital converter (ADC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
3.18.1
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Contents
3.18.2
3.18.3
3.18.4
STM32G483xE
Internal voltage reference (VREFINT) . . . . . . . . . . . . . . . . . . . . . . . . . . 31
VBAT battery voltage monitoring . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Operational amplifier internal output (OPAMPxINT): . . . . . . . . . . . . . . . 31
3.19
3.20
3.21
3.22
3.23
3.24
3.25
Digital to analog converter (DAC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Voltage reference buffer (VREFBUF) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Comparators (COMP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Operational amplifier (OPAMP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Random number generator (RNG) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Advanced encryption standard hardware accelerator (AES) . . . . . . . . . . 33
Timers and watchdogs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
3.25.1
3.25.2
3.25.3
3.25.4
3.25.5
3.25.6
3.25.7
Advanced motor control timer (TIM1, TIM8, TIM20) . . . . . . . . . . . . . . . 35
General-purpose timers (TIM2, TIM3, TIM4, TIM5, TIM15, TIM16,
TIM17) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
Basic timers (TIM6 and TIM7) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
Low-power timer (LPTIM1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
Independent watchdog (IWDG) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
System window watchdog (WWDG) . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
SysTick timer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
3.26
3.27
3.28
3.29
3.30
3.31
3.32
3.33
3.34
3.35
3.36
3.37
3.38
3.39
3.40
Real-time clock (RTC) and backup registers . . . . . . . . . . . . . . . . . . . . . . 38
Tamper and backup registers (TAMP) . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
Infrared transmitter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
Inter-integrated circuit interface (I
2
C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
Universal synchronous/asynchronous receiver transmitter (USART) . . . 41
Low-power universal asynchronous receiver transmitter (LPUART) . . . . 42
Serial peripheral interface (SPI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
Serial audio interfaces (SAI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
Controller area network (FDCAN1, FDCAN2, FDCAN3) . . . . . . . . . . . . . 44
Universal serial bus (USB) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
USB Type-C™ / USB Power Delivery controller (UCPD) . . . . . . . . . . . . . 44
Clock recovery system (CRS) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
Flexible static memory controller (FSMC) . . . . . . . . . . . . . . . . . . . . . . . . 45
Quad-SPI memory interface (QUADSPI) . . . . . . . . . . . . . . . . . . . . . . . . . 46
Development support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
3.40.1
3.40.2
Serial wire JTAG debug port (SWJ-DP) . . . . . . . . . . . . . . . . . . . . . . . . . 47
Embedded trace macrocell™ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
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Contents
4
Pinouts and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
4.1
4.2
4.3
4.4
4.5
4.6
4.7
4.8
4.9
4.10
4.11
UFQFPN48 pinout description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
LQFP48 pinout description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
LQFP64 pinout description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
LQFP80 pinout description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
LQFP100 pinout description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
LQFP128 pinout description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
WLCSP81 pinout description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
TFBGA100 pinout description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
UFBGA121 pinout description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
Pin definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
Alternate functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71
5
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78
5.1
Parameter conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78
5.1.1
5.1.2
5.1.3
5.1.4
5.1.5
5.1.6
5.1.7
Minimum and maximum values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78
Typical values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78
Typical curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78
Loading capacitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78
Pin input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78
Power supply scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79
Current consumption measurement . . . . . . . . . . . . . . . . . . . . . . . . . . . 80
5.2
5.3
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80
Operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82
5.3.1
5.3.2
5.3.3
5.3.4
5.3.5
5.3.6
5.3.7
5.3.8
5.3.9
5.3.10
5.3.11
General operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82
Operating conditions at power-up / power-down . . . . . . . . . . . . . . . . . . 83
Embedded reset and power control block characteristics . . . . . . . . . . . 83
Embedded voltage reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85
Supply current characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86
Wakeup time from low-power modes and voltage scaling
transition times . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 112
External clock source characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 113
Internal clock source characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 118
PLL characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 121
Flash memory characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 122
EMC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 123
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