Using CD4060 to form a long delay timer circuit

The power supply forms a power-on reset through C3, R7, C2, and R4, which resets IC1 and IC2, and the output is 0. The Q4 of CD4518 outputs a low level, which is inverted to a high level by D1, VT1 is turned on, and relay K1 is energized. The gate circuit inside CD4060 (pins (9), (10), and (11)) plus the multivibrator composed of R1, R2, RPl, and C1 is used as a clock signal, which is output from Q14 to the CD4518 counter (falling edge triggered) through the 2-stage frequency division composed of CD4060. When the 8th pulse output by CD4060 passes through CD4518, the Q4 pin of IC2 outputs a high level, which is inverted to a low level by D1, VT1 is turned off, and relay K1 is released.

At the same time, the output signal of D1 is inverted to a high level by D2 and sent to the CP terminal, so that the output state of CD4518 remains unchanged. Adjust RP1. Change the clock frequency to fine-tune. Change the output wiring method of CD4060 and CD4518 to roughly adjust the timing time. S1 is the reset button. No matter what state the timing is in, press S1 and the timing will start from the beginning.