Regeneration receiving circuit diagram

Receiving principle: The regenerative receiving circuit is shown in Figure 18-22. The super regeneration receiving module has 7 terminals, namely ⑩, ⑩, @, @,
GND, @, Vr. Among them, VIr is the 5V power supply terminal, GND is the ground terminal, @ terminal is the effective decoding output terminal, ⑩, @, @, @ are
the ⑩～⑩ pins of the decoding chip PT2272 (SC2272) integrated circuit, which are the 4-bit data latch output terminals. , it can output a high level of about 5v when there is a signal
, and the driving current is about 2mA, which corresponds to the four keys on the transmitter one by one. When the power supply is 5v, the receiving circuit
is in standby mode. When the remote control signal is received, after frequency selection by k and C2, amplification, shaping, encoding, and decoding
processing , it is sent to the PT2272 infrared receiving chip for "temporary storage" function processing to make the transmitter signal disappear. When, the corresponding data bit
output of PT2272 becomes low level; or the "latch" function is processed so that when the transmitter signal disappears, the data bit output of PT2272- remains in the original state until a
new signal input is received again. Finally, the PT2272 output terminal (@ terminal is the effective decoding output terminal) controls
the corresponding load through various interface circuits. ,
    in the figure, the @ pin of PT2272 is the effective receiving status indication, ⑩~@ are the 4 decoded data pins, ①~⑧ are the i-state (V,
V∞, empty) encoding pins; the ① pin (RXD) of LM358 The output is the decoded Fangdu signal,