latch storage circuit

The use of saturable transformers makes the memory less likely to be lost and not affected by erroneous command signals. The transformer remains magnetically biased without the need for a voltage supply to provide a baseline state, and when the power is turned on, the memory latch returns. When the bit is initially stored in the circuit , the set or reset pulse must have a minimum width of 35 microseconds and a minimum interval of 65 microseconds.