OV7670 Image Acquisition Based on FPGA Simple Design Method

goodbey155

OV7670 Image Acquisition Based on FPGA Simple Design Method [Copy link]

Title

Realize the configuration of camera OV7670 and complete image acquisition. Please consider which modules are needed to implement this function? Divide the modules and give the port definition, no need to write code.

Module division

According to the peripheral interaction architecture to be configured, the module division is shown in Figure 6-16:

Figure 6-16 Preliminary module division

Further analysis of the configuration module and interface module.

1. Configuration module

From the datasheet of OV7670, it can be seen that the OV7670 can work normally only after completing the configuration of certain necessary registers, and different registers can be configured to achieve different functions. The configuration module generates read and write commands, data and addresses to the interface module according to the configuration requirements. The configuration table contains the operation code, the address of all registers and the configuration value of the register.

The configuration table is introduced in detail below. The following is a partial configuration table of OV7670:

(1) REG_NUM represents the total number of external registers.

(2) The format of the configuration table is: "operation code" + "address" + "configuration value", for example: add_wdata = {2'b11,16'h1204}, its operation code is 2'b11, address is 8'h12, and configuration value is 8'h04.

(3) The operation code is 2 bits, 00 means no operation; 01 means read-only; 10 means write-only; 11 means write first and read later.

(4) The configuration module reads the configuration table and sends commands to the interface module according to the operation code. If the opcode is 00, skip this command; if the opcode is 01, generate a read command to the interface module, the read address is the address given in the configuration table; if the opcode is 10, generate a write command to the interface module, the write address and write data are given by the configuration table; if the opcode is 11, first give the write command, the write address and write data are given by the configuration table, after execution, give the read command, the read address is the same as the write address of this operation.

Using the configuration-required peripheral interaction architecture, when configuring the registers of multi-functional peripherals, it is very convenient to debug, which can be achieved by simply modifying the configuration table, so Mingdeyang strongly recommends that such peripherals use this architecture. The debugging process generally involves confirming the read operation to see if one register data can be read, thereby ensuring that the read operation is OK; then writing one register and reading it out to confirm whether the data read out is the same as the data written in, thereby ensuring that the read and write operations are OK; then continuously reading and writing a group of registers in sequence to ensure that each read and write is correct; finally, canceling the read function and retaining only the write function as the final code.

2. Interface module

The interface module needs to complete two functions: one is to complete the configuration of OV7670, that is, to generate SCCB operation timing according to the read and write commands and data of the configuration module (refer to the datasheet of OV7670, the configuration interface of OV7670 is SCCB); the second is to complete the image acquisition of OV7670. Therefore, the module division principle is one function one module, and the interface module can be divided into SCCB interface module and acquisition module.

To summarize, the module division result is shown in Figure 6-18.

Figure 6-18 Module partition block diagram

Module ports and data flow between modules

After the modules are divided, it is necessary to further confirm the module ports and the data flow between modules. Please refer to 5.1.2 Module Division Port Specification. The final result of module partitioning is shown in Figure 6-19:

Figure 6-19 Final block diagram of module partitioning

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goodbey155

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