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Abstract: This paper introduces the functions and features of the high-precision clock chip RTC-4553, which is newly launched by EPSON. It includes the internal structure and pins, function control and single-byte reading procedure. Keywords: MCU clock chip RTC-4553 There are many popular serial clock chips now, such as DS1302, DS1307, PCF8485, etc. These chips have simple interfaces, low prices, and are easy to use, and are widely used. However, these chips have disadvantages such as low clock accuracy, being easily affected by the environment, and clock confusion. This article introduces a new RTC-4553 clock chip launched by EPSON. This chip uses a built-in crystal oscillator and a unique data method to greatly improve the clock accuracy and reliability. RTC-4553 is equipped with a serial communication interface, a 30×4bit SRAM, a 100-year calendar from 2000 to 2099, a 14-pin SOP package, a battery power consumption of 2μA, a clock error of <3 min/year, and no adjustment is required. It is an ideal chip for high-precision clocks in instruments and meters.
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1 Internal structure and pins The internal structure of the serial clock chip is shown in Figure 1. It includes I/O controller, shift register, command and logic controller, state RAM, real-time clock, counter, crystal oscillator and other parts. Figure 2 is the pin diagram of RTC-4553. CS0 is the chip select pin, which is selected when it is low level; WR is the read/write enable port, which is high for reading and low for writing; L1~L5 are used for factory adjustment of accuracy and testing, and are left floating during use;  CS1 is the chip power-off check port, which can be directly connected to the system power supply. When the chip detects that this port is low, it automatically enters a low power consumption state; SCK is the clock port, SIN is the data input port, and SOUT is the data output port. In addition, the chip also has a clock signal output port TPOUT, which can output 1024Hz or 1/10Hz signals for detecting the clock accuracy of the chip. 2 Functions and Controls 2.1 Registers RTC-4553 has a total of 46×4bit registers. These registers are divided into 3 pages. Page 1 has 16 registers, which are clock registers and control registers, as listed in Table 1. They are used to store seconds, minutes, hours, days, months, years, weeks and 3 special registers; Page 2 and Page 3 have 15 registers each, a total of 30 SRAM registers. The page selection is achieved by operating the MS1 and MS0 bits of control register 3.
Table 1 | Page 0 | Page 1 | Page 2 | | Address A3A2A1A0 | Functional Description | Address A3A2A1A0 | Functional Description | Address A3A2A1A0 | | 0
1
2
3
4
5
6
7
8
9
0A
0B
0C
0D
0E
0F | Units of second,
Tens of second,
Units of minute,
Tens of
minute, Units of hour, Tens of hour, Weekday , Units of day, Tens of day, Units of month, Tens of month, Units of year, Tens of year, Control register 1 , Control register 2, Control register 3
| 0
1
2
3
4
5
6
7
8
9
0A
0B
0C
0D
0E |
Static
RAM
area
| 0
1
2
3
4
5
6
7
8
9
0A
0B
0C
0D
0E |
Static
RAM
area | Control register 1: CNT1 TPS——TPOUT output clock selection bit, 1 outputs 1024Hz, 0 outputs 1/10Hz; CNTR——Clock register clear flag; 24/12——1 is 24-hour system, 0 is 12-hour system. Control Register 2: BUSY——carry overflow; PONC - initial power-on detection, 1 means the time needs to be calibrated after power-on. Control Register 3: MS1, MS0 - page select bits, 00 and 01 point to page 0, 10 points to page 1, and 11 points to page 2. 2.2 Data Readout In the chip select, when WR is set high, the chip is in the read state. As the clock on the SCK pin changes, the data of the internal register will appear on the SOUT pin. Input requires 8 clocks, 4 of which are used to input the address; output data also requires 8 clocks, including 4 address bits and 4 data bits. Data is input on the rising edge of SCK and output on the falling edge. The address of the register is input by the SIN pin, and the page is determined by MS0 and MS1. Figure 3 is a read timing diagram.
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2.3 Data write RTC-4553 uses special write instructions. The operations of 0D~0FH of page 0 and registers of page 1 and page 2 are written in the conventional way. The data after the address will be written into the register as it is. The write operation instruction of the time register can only add 1 to the internal content and automatically complete the conversion. Figure 4 shows the time register write sequence. This unique design of the chip prevents the possibility of illegal data being accidentally interfered with by the clock area data, which is the reason for the high reliability of the chip.
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3 Application RTC-4553 uses serial communication, and the interface with the microcontroller is simple. In the design, the RAM area can be used to store a small amount of data that the system needs to save after a power outage. CS1 can also be connected to the power-off detection port of the microcontroller so that it can quickly enter a low-power state. Figure 5 takes the PIC microcontroller as an example to give a connection diagram. According to Figure 5, the single-byte read procedure is given: Entry: The lower 4 bits of FDE store the read address, and the lower 4 bits of W store the read address BSF RA, WR; read status BCF RA, CS0; chip selection MOVLW 8 MOVWF Count ; prepare to send 8 bits LOOP: BCF RA, SCK; SCK low level BCF RA, SIN BTFSS FDE, 0; bit 0 of FDE is 1 ; then the SIN port is 1 GOTO LLL; otherwise the SIN port outputs 0 BSF RA, SIN LLL: RRF FDE, 1; FDE moves right, ready to send the next bit BSF RA, SCK; SCK high level DECFS2 Count GOTO LOOP; read instruction completed MOVLW 8 ; Prepare to receive data MOVWF Count LOOP1: BCF RA, SCK NOP BSF RA, SCK RRF W，0 BCF W, 0 BTFSS RA, Sout; read judgment GOTO LLL1 BSF W，0 LLL1: DECFS2 Count GOTO LOOP1 BCF RA, CS0; End, turn off the chip
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