Definition and Testing of Dynamic Parameters of High-Speed Analog-to-Digital Converters

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Definition and Testing of Dynamic Parameters of High-Speed Analog-to-Digital Converters [Copy link]

1. Dynamic parameters

The parameter definitions and descriptions of the high-speed analog-to-digital converter (ADC) are shown in Table 1.

　Table 1. Dynamic parameter definition:

2. Circuit board layout and hardware requirements in the test plan

To properly test the dynamic parameters of high-speed ADCs, it is best to use pre-assembled circuit boards from manufacturers or refer to the circuit board layout recommended in the data sheet. The layout of high-speed data converters requires high-speed circuit design skills and should generally follow the following basic rules:

All bypass capacitors should be installed as close to the device as possible, preferably on the same level as the ADC, and surface mount components should be used to shorten the leads and reduce parasitic inductance and capacitance.

The analog power supply, digital power supply, reference power supply and input common terminal are bypassed to ground by two 0.1mf ceramic capacitors and one 2.2mf bipolar capacitor in parallel.

Use multi-layer circuit boards with separate ground and power planes to ensure signal integrity.

When using independent ground planes, the physical location of the ADC analog ground and digital ground should be considered. The impedance between the two ground planes should be as low as possible, and the AC and DC voltage difference between the two should be less than 0.3V to avoid device damage and deadlock. The analog ground and digital ground should be connected at a single point, which can be connected with low-resistance surface-mount resistors (1ω~5ω), ferrite beads, or directly short-circuited to avoid interference of noisy digital ground currents on the analog ground.

If the analog ground and digital ground are sufficiently isolated, all ground pins can be placed on the same plane.

High-speed digital signal lines should be kept away from sensitive analog signal lines.

All signal lines should be as short as possible and have no 90° corners.

The clock input should be treated as an analog input signal, away from any analog input and digital signals.

Choosing the right test solution and the right test equipment is an important step in obtaining the best parameters for data converters. The hardware selection solution proposed below is necessary and effective for testing the high-speed ADC MAX1448.

DC power supply (hewlett packard e3620a, dual power supply 0-25v, 0-1a):

Provide independent power supplies for analog and digital circuits. Each power supply must be able to provide a driving current of 100ma.

Clock signal function generator (hewlett-packard hp8662a):

The clock input of the device under test accepts a clock signal compatible with CMOS levels. Since the MAX1448 uses a ten-stage pipeline structure and the inter-stage conversion depends on the repeatability of the rising and falling edges of the external clock, a low-jitter, fast-rising/falling external clock signal is required. In particular, the sampling of this converter occurs on the falling edge of the clock signal, and the jitter of the falling edge should be minimized. Aperture jitter limits the SNR performance of the ADC:

snrdb = 20·log10 (1/2π·fin·taj)

where fin is the analog input frequency and taj is the aperture jitter time. In undersampling applications, the clock jitter index is more stringent.

Input signal function generator (hewlett-packard hp8662a):

To ensure normal operation, the two function generators (clock and input signal) must be phase-locked.

Logic Analyzer - (hewlett-packard hp16500c):

Select a logic analyzer based on the sampling points required by the FFT. For example, the HP1663C has a data recording capacity of less than 4K and can be used in this test.

Analog bandpass filter (tte elliptic function bandpass filter q56 series):

Cut-off frequencies: 7.5mhz, 20mhz, 40mhz and 50mhz

Digital Multimeter (DMM): Used to check reference, supply and common mode voltages.

Evaluation board for the device under test.

The logic analyzer is synchronized with an external clock signal from the circuit board and phase-locked to the rising edge of the clock. When collecting data, the data can be stored on the data acquisition board, exchanged through the logic analyzer's HPIB bus, or stored on the logic analyzer's hard disk or floppy disk.

Figure 1: System configuration for testing snr, sinad, thd, and sfdr

The next consideration was the selection of appropriate software tools. The following software tools were selected for data acquisition and analysis:

* labwindows/cvi: establishes a communication link between the logic analyzer and the data acquisition board and performs data acquisition.

* Matlab: A software tool used to perform FFT and dynamic parameter analysis on the acquired data. The source code can be obtained from the Maxim Chinese website (www.maxim-ic.com.cn).

The overall circuit block diagram used for testing is shown in Figure 1.

3. Power spectrum, frequency resolution, spectrum leakage and window function

Fast Fourier Transform (FFT) and power spectrum are very useful tools for analyzing and measuring acquired data records. These tools can effectively acquire time domain signals, measure their spectral components, and display the results.

Frequency resolution

The frequency range and resolution of the power spectrum (reference sampling procedure) on the frequency axis (x-axis) depends on the sampling rate and the length of the data record (number of sampling points). The number of frequency points or spectral lines on the power spectrum is n/2, where n is the number of points contained in the signal sampling record. All frequency points are spaced apart by fsample/n, which is usually called frequency resolution or fft resolution:

bin = fsample/n = 1 / (n·(tsample)

Spectral Leakage and Window Functions

Window functions are often used in FFT analysis. Correctly selecting the window function is critical in FFT-based measurements. Spectral leakage is caused by the assumptions in the FFT algorithm, which assume that discrete time series can be accurately extended in the entire time domain, and all signals containing this discrete time series are periodic functions, with the period related to the length of the time series. However, if the length of the time series is not an integer multiple of the signal period (fin/fsample (nwindow/nrecord), the assumption is not true and spectral leakage will occur. In most cases, an unknown stationary signal is processed, and the number of sampling points cannot be guaranteed to be an integer multiple of the period. Spectral leakage causes the energy of a given frequency component to leak to adjacent frequency points, thereby introducing errors in the measurement results. Choosing an appropriate window function can reduce the spectral leakage effect.

To further understand the impact of the window function on the spectrum, let's examine the frequency characteristics of the window function. Passing the input data through a window function is equivalent to the convolution of the spectrum of the original data and the spectrum of the window function. The spectrum of the window function consists of a main lobe and several side lobes, with the main lobe centered on each frequency component of the time domain signal. The side lobes decay to zero at certain intervals on both sides of the main lobe. FFT produces a discrete spectrum, and what appears on each spectrum line of FFT is the continuous convolution spectrum on each spectrum line. If the spectrum components of the original signal are exactly the same as the spectrum lines in FFT, in this case, the length of the sampled data is an integer multiple of the signal period, and there is only the main lobe in the spectrum. The reason why there are no side lobes is that the side lobes are located at the zero component points at the sampling frequency intervals on both sides of the main lobe of the window function. If the length of the time series is not an integer multiple of the period, the continuous spectrum of the window function will deviate from the center of the main lobe, and the frequency offset corresponds to the difference between the signal frequency and the FFT frequency resolution. This offset causes the appearance of side lobes in the spectrum. Therefore, the side lobe characteristics of the window function directly affect the leakage width of each spectrum component to the adjacent spectrum.

Window function characteristics

To simplify the selection of window functions, it is necessary to define some parameters to compare different windows. These parameters are: -3db main lobe bandwidth, -6db main lobe bandwidth, side lobe peak value, and side lobe decay rate (Table 2).

Each window function has its own characteristics, and different window functions are suitable for different applications. To select the correct window function, you must first estimate the spectral components of the signal. If there are many strong interfering frequency components far away from the measured frequency in the signal, a window function with a faster sidelobe attenuation rate should be selected; if the strong interfering frequency component is close to the measured frequency, a window function with a smaller sidelobe peak should be selected; if the measured signal contains two or more frequency components, a window function with a very narrow main lobe should be selected; if it is a single frequency signal and requires high amplitude accuracy, it is recommended to use a window function with a wide main lobe. Continuous sampling is used for signals with a wide frequency band or containing multiple frequency components. Most applications can obtain satisfactory results using the Hanning window because it has good frequency resolution and the ability to suppress spectrum leakage.

4. Dynamic parameters: snr, sinad, thd, sfdr and ttimd

Referring to the above content, the power spectrum, spectrum leakage, window function, SNR, SINAD, THD, and SFDR can be calculated by FFT using MATLAB software:

snr=10*log10(ps/pn)

sinad=10*log10(ps/(pn+pd))

thd=10*log10(pd/ph(1))

sfdr=10*log10(ph(1)/max(ph(2:10)))

Among them: ps - signal power, pn - noise power, pd - offset power caused by the second to fifth harmonics, ph(1) - harmonic power (fundamental), ph(2:10) - second to ninth harmonic power. The measurement of two-tone intermodulation (TTIMD) is very clever. The two input frequencies are combined by a power synthesizer to produce intermodulation components, which are used to simulate the intermodulation distortion of the ADC. When selecting the input frequency, the following conditions must be considered to optimize the intermodulation performance: select a frequency within the passband of the input filter; if the two selected input frequencies are very close, the correct window function must also be selected. However, if the frequencies are too close, the power synthesizer will simulate all intermodulation products generated by the second and third intermodulation; when the two input frequencies differ too much, a window function with a lower frequency resolution may need to be selected.

in conclusion

There are many factors to consider when capturing signals from high-speed ADCs and analyzing them to determine the dynamic performance of data converters. Understanding the basics of FFT-based measurements and the associated calculations, spectrum leakage effects, how to avoid spectrum leakage with the help of appropriate test equipment, and wiring techniques will allow for successful data acquisition and analysis.

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