RS485 automatic transceiver circuit hardware design and its common key elements
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This article mainly discusses how to design RS485 interface circuits, and briefly introduces several key elements usually involved in interface circuit design.
RS485 is half-duplex communication, which means that the channel can only be in the receiving or sending state at one time. The characteristics of RS485 are support for multi-node transmission, long transmission distance, and strong anti-interference ability. RS485 can connect multiple 485 devices, and the signal rate can reach 10Mbps. The voltage difference between the AB lines is used to determine whether it is a logic level 1 or a logic level 0. When the voltage difference between AB is greater than 200mV, it is a high level 1, and when it is less than 200mV, it is a logic level 0. Generally, a 120Ω resistor is connected at both ends to perform impedance matching and eliminate signal reflection.
RS485 hardware circuit design
RS485 circuit design can be divided into isolated and non-isolated types . The figure below is a non-isolated circuit. The B terminal is connected to GND and pulled down, and the A terminal is high through the pull-up resistor to ensure that the voltage difference between A and B is greater than 200mV. The DE and RE pins are send and receive enable. When RE is low, it is receive enable; when DE is high, it is send enable. In applications, the two are generally connected together and controlled by the IO port (RS485_EN). Because the chip is either in reception or transmission, before sending data, the RS485_EN signal is high, and when receiving data, it is low.
RS485 automatic transceiver circuit hardware design
The difference between the automatic transceiver circuit and the ordinary 485 circuit is that there is one more transistor to control the enable pin of 485. The R9 current limiting resistor is generally 4.7K, and the R8 pull-up resistor is generally 4.7K. The enable pin is pulled up when the transistor is not turned on.
When receiving data: the receiving data pin is the first pin of the chip, which is the network label RS485_RX. During the data receiving process, the RS485_TX pin maintains a high level, VGS is a high level, the NPN transistor Q1 is turned on, and the pins connected to RE and DE are pulled down to GND through the transistor. At this time, the reception is enabled and is in the receiving state.
When sending data: the data sending pin is RS485_TX, RS485_TX should send 1, the transistor is turned on, the levels of RE and DE are low, the RS485 transceiver chip is not turned on, because 485 is high level under normal conditions, the data is high at this time; when RS485_TX sends 0, the transistor is not turned on, at this time the send enable of the 485 transceiver chip is high, and DI is always pulled down to GND, so the data sent is 0. In this way, the automatic transmission and reception of 485 is realized.
Send specific analysis:
RS485_TX sends 1, VGS is high, NPN transistor is turned on, enable pin is low, sending is invalid, receiving is enabled, and it is in receiving state. Since the AB pin of SP3485 chip is in high impedance state, R4 pulls A high and R5 pulls B low, so AB transmits 1. That is, when RS485_TX sends 1, AB pin sends 1.
Design of lightning protection circuit for RS485 interface
Interface protection circuit
L1 is a common mode inductor, which attenuates common mode noise and enhances anti-interference capability. 120Ω/100MHz is generally selected. The function of C3 capacitor is to separate the interface ground and digital ground. 1000pF is generally selected. In order to meet the EMC protection requirements, the differential mode signal is 2kV and the common mode signal is 6kV. A gas discharge tube, thermistor, and TVS tube will be reserved at the interface to form a protection circuit.
GND design of RS485 interface circuit PCB
The protective devices at the dotted line should be placed as close to the interface as possible and placed compactly and neatly, with the protective devices placed first and then the filter devices.
RS485 interface circuit design usually involves several key elements, including signal transmission, electrical isolation, noise suppression, protection measures, power supply and control logic design.
Signal line selection and wiring
Use a pair of twisted-pair cables as differential signal lines (A and B), and shielded twisted-pair cables are usually selected to reduce electromagnetic interference.
Keep the A and B lines as equal in length as possible to reduce signal delay differences and ensure signal integrity.
Common Mode Inductors and Filtering
Add common-mode inductor L1 at the entrance of the signal line to suppress common-mode interference. The recommended impedance range is 120Ω/100MHz ~ 2200Ω/100MHz.
It may also be necessary to connect components such as decoupling capacitors and TVS tubes in parallel to further improve the anti-interference capability.
Transceiver Chip Select
Common transceiver chips include SP3485, MAX485, etc., which convert TTL/CMOS logic levels into RS485 differential signals.
Pay attention to the connection logic of control pins such as RE, DE and RO. Usually RE and DE can be connected together to control the send/receive mode through a single control signal.
Bias and Termination Resistors
The A signal line may require a pull-up resistor (e.g. 10kΩ to 4.7kΩ) to ensure the voltage state when idle, and the B signal line may need to be pulled down to GND.
Place 120Ω terminal resistors at both ends of the bus or at appropriate locations to reduce signal reflections and improve signal quality.
Lightning and surge protection
TVS tubes and/or resettable fuses can be added to signal lines for overvoltage and surge protection to improve the robustness of the circuit.
For high-risk environments, consider adding lightning protection circuit design above 6kV.
EMC Design
Ensure good grounding design, especially the interface ground processing. Sometimes the board ground is directly connected to the casing and coupled through a 1000pF capacitor.
When laying out the circuit board, pay attention to the separation of power and signal lines, reduce cross-interference, and add filtering and decoupling capacitors.
Control Logic
Design control logic circuits or use MCU control to send enable signals to achieve automatic or manual switching according to application requirements.
For automatic transceiver circuit design, more complex logic may be required to automatically manage the transmission and reception status to adapt to different communication scenarios.
The RS485 interface design not only focuses on electrical characteristics, but also needs to comprehensively consider factors such as EMC, reliability, and safety to ensure stable communication in complex industrial environments.
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