Chapter 2 General Knowledge of Electronic Hardware (3) Chip Levels

皓月光兮非自明

Chapter 2 General Knowledge of Electronic Hardware (3) Chip Levels [Copy link]

Chapter 2 General Knowledge of Electronic Hardware

4. Chip level

1. Chip current source, current sink, current sink

①In input mode

Current Sinking: Connect the external voltage level to GND through the internal loop of the chip.

②In output mode

Sink current: Current flowing out of the chip.

Source current: Current flowing into the chip.

2. Chip I/O output impedance

Single-ended signal output impedance level structure

Serial number	I/O Interface	standard name	Quick description
1	TTL and CMOS compatible standards	JESD18A	Use the signal of this interface standard to determine the threshold value, output and input current, matching terminal resistance, output impedance calculation method and other information
2	LVTTL level	JESD8-5A-019
3	SSTL_3 (3.3V)	JESD8-8
4	SSTL_2 (2.5V)	JESD8-9B
5	SSTL_18 (1.8V)	JESD8-15A
6	HSTL	JESD8-6

In the JESD8-15A standard, the output impedance calculation formula is:

3. Logic level conversion method

Logic Level	TTL	(1) TTL refers to transistor logic level; (2) Transistors are current-controlled devices with low output resistance; (3) Transistor logic level switching speed is fast, but the power consumption is higher than that of CMOS structure.
	CMOS	(1) CMOS refers to the logic level of MOS tube; (2) MOS tube is a voltage-controlled device with a large input resistance; (3) The logic level switching speed of MOS tube is slow, but the power consumption is lower than that of TTL structure; (4) The input impedance of CMOS devices is extremely large, and even a slight external interference can cause a voltage level reversal. Therefore, unused input pins on CMOS devices should be pulled up or down and must not be left floating.
Low voltage logic level	LVTTL	——
	LVCMOS	——
other	SSTL, HSTL, etc.	——

lugl4313820

What is the critical point of TTL level? For example, if the level is 3.3V, how many volts is the dividing point between high and low levels? Does the book mention it?

皓月光兮非自明

lugl4313820 Published on 2024-3-18 12:38 What is the critical point of TTL level? For example, for a 3.3V level, how many volts is the dividing point between high and low levels? Is there any information in the book?

Yes, please refer to the following:

lugl4313820

The bright moonlight is not self-evident. Published on 2024-3-24 23:45 Yes, for reference:

There are also 1.8V levels. How does he distinguish them?

皓月光兮非自明

lugl4313820 posted on 2024-3-25 07:36 There are also 1.8V level ones, how do you distinguish them?

Generally, the design is based on the requirements of the IC designer. The response range is generally increased or decreased by the design application environment, but the upper and lower limits of the response are mainly determined by the manufacturer's process level.