Domestic DSP teaching experiment box_Operation tutorial: 3-1 Audio acquisition and playback experiment

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Domestic DSP teaching experiment box_Operation tutorial: 3-1 Audio acquisition and playback experiment [Copy link]

实验8

1. Experimental Purpose

Learn how to use McASP pins, master the principles and processes of audio acquisition and playback, and implement audio acquisition and playback.

2. Experimental Principle

1. Schematic diagram

(1) The audio interface uses a 24.576MHz (read as megahertz) crystal oscillator.

(2) There are three audio ports on the experimental board: LINE IN, MIC IN and LINE OUT.

(3) Audio data is read and written via the I2C bus.

(4) The clock of McASP (letter) comes from the crystal oscillator clock. After frequency division, the frame synchronization signal and bit synchronization signal can be obtained.

2. Functional block diagram

(1) Data accuracy supports 16/20/24/32 bit.

(2) Supported rates range from 8kHz to 96kHz. The sampling rate defines the number of samples extracted from a continuous signal per second to form a discrete signal. The more points per unit time, the more complete the sound information, and of course, the closer it is to reality.

(3) The control bus can be selected as SPI or I2C.

(4) The audio serial data bus supports four protocol formats: I2S, left-aligned format, right-aligned format, and DSP format.

(5) There is a programmable PLL that can flexibly generate clocks.

3. Audio chip functional block diagram

(1) At the bottom of the block diagram are the power supply part, clock generation part, and SPI or I2C serial bus control part.

(2) The chip collects the input audio analog signal through the left and right channels.

(3) After ADC sampling, the digitized audio data is obtained.

(4) The digitized audio data is transmitted to the DSP through the audio serial bus interface.

(5) The digitized audio after DSP processing is transmitted from DSP to DAC through the audio serial bus interface.

(6) The audio is restored to an output analog signal through the DAC.

(7) Finally, the audio analog signal is output through headphones or speakers.

Through the explanation of the block diagram, we can summarize the working process of the audio chip. The audio analog signal is sampled through the left and right channels respectively, converted into a digital signal by the ADC and transmitted to the DSP through the McASP. After the DSP processing is completed, it is transmitted to the DAC through the McASP. Finally, after being converted into an analog signal by the DAC, it is output in the left and right channels.

4. McASP (Multichannel Audio Serial Port) Universal Audio Serial Port

(1) McASP consists of transmit and receive parts, which can run synchronously or completely independently using their own master clock, bit clock and frame synchronization signals, and can use transmission modes with different bit stream formats.

(2) The McASP module includes 16 serializers that can be activated individually for transmission or reception. In addition, all McASP pins can be configured as general-purpose input and output (GPIO) pins.

(3) McASP transmission modes: burst transmission mode, time division multiplexing (TDM) transmission mode and digital audio interface (DIT) transmission mode.

5. McASP transmission mode--time division multiplexing mode

TDM is time division multiplexing mode. Time division multiplexing refers to a technology that transmits multiple digital data, voice and video signals on the same communication medium at the same time by interleaving bit pulses in different channels or time slots. Using this technology, more than two signals or data streams can be transmitted on the same communication line. Each signal or data stream takes turns to occupy the physical channel.

(1) The TDM format can be used for data transmission between a DSP chip and one or more analog-to-digital converters (ADCs) and digital-to-analog converters (DACs).

(2) The TDM format consists of three parts: clock, data and frame synchronization signal.

(3) A frame includes multiple channels. Each TDM frame is defined by a frame synchronization signal (AFSX or AFSR).

(4) Data transmission is continuous with no delay between units.

(5) The number of bits in each unit at the transmitting and receiving ends of the system must be consistent, because the unit boundary is not determined by the frame synchronization signal.

McASP transmitters and receivers support multi-channel transmission. Through the TDM transmission mode, data streams that conform to the time division multiplexing (TDM) format can be used. In this transmission mode, devices compatible with the I2S protocol. The I2S protocol is mainly used for the transmission of audio data. There is a 1-bit delay between the highest bit of the data and the channel selection signal. A frame of data contains two data units, which transmit the data of the left channel and the right channel respectively.

There are two ways to access McASP, the first is to enable FIFO, the second is to disable FIFO. Both methods require configuration of DMA bus and external bus.

6. Procedure Flow

In the program flow design, the pin multiplexing configuration of I2C and McASP must be performed first, then the PSC of EDMA3 is enabled and the DSP interrupt is initialized, and then the audio chip is initialized and McASP is initialized to EDMA mode. Finally, the audio data is received and exchanged and the audio data is continuously output.

6. Source code

Pin multiplexing source code

When controlling peripherals based on StarterWare, you can call the corresponding API interface without configuring complex registers. The function source code for I2C and McASP pin multiplexing configuration can be viewed in I2C.c and McASP.c respectively.

DMA (Direct Memory Access)

(1) The CPU gives the DMA information such as the source, destination, and number of data to control the data transfer. During this period, the CPU can run other programs. When the data transfer controlled by the DMA is completed, an interrupt is sent to tell the CPU that the data transfer is complete, allowing the CPU to process the data, thereby increasing the speed of the algorithm.

(2) TI has designed an enhanced direct memory access controller EDMA3 specifically for the TMS320C6748. EDMA3 has a total of 32 channels with selectable channel priorities, which can achieve seamless data transfer. Using EDMA, data transfer can be achieved between on-chip memory, on-chip peripherals, and external memory.

(3) The Enhanced Direct Memory Access Controller (EDMA3) is a high-performance, multi-channel, multi-threaded DMA controller that allows users to program the transfer of large amounts of one-dimensional and multi-dimensional data without relying on the CPU to move data.

3. Operation phenomenon

1. Experimental equipment

The hardware interfaces used in this experiment are LINE IN and LINE OUT interfaces. The required hardware is the experimental board, emulator, power supply, audio cable, headphones and music player. This operation is to use a mobile phone to play music.

2. Software Operation

Import the project and select the corresponding project in the Demo folder

Compile the project and generate an executable file

Connect CCS to the development board and load the program

Click Run Program

You can listen to the music played on your phone through the headphones.

After the experiment is over, first click the yellow button to pause the program, then click the red button to exit the connection between CCS and the experimental board, and finally turn off the power of the experimental box.