[Output transmission data on the falling edge of the transmission clock, input reception data on the rising edge] What is the meaning of this rule?

一沙一世

[Output transmission data on the falling edge of the transmission clock, input reception data on the rising edge] What is the meaning of this rule? [Copy link]

邀请：@damiaa   @led2015   @吾妻思萌   @wangerxian   参与回复

As shown in the figure below [transmit data is output on the falling edge of the transmit clock, and receive data is input on the rising edge]. Sending and receiving cannot be performed within the same clock pulse. What is the significance of this regulation?

damiaa

This is the logical timing relationship of this UART. It tells you that the input data must be stable before the rising edge arrives, so that the chip can receive it, and the data is output at the falling edge. You can receive the data from the chip at this time.

It's not good or bad. You just do it as the chip says. Otherwise, it will go wrong.

wangerxian

This is similar to a protocol. The rising edge and falling edge are instantaneous, so it is better to use this rising edge and falling edge to send and receive. The microcontroller can also easily detect it, and the data at this time is generally more stable.

吾妻思萌

The most reliable way to make agreements is currently discovered by generations of engineers.

吾妻思萌

A few more words~ In essence, we count and compare numbers based on conventions. Decimal, hexadecimal, 73-decimal, and 82-decimal are all agreed upon. Follow this and execute~ The same is true for the rising and falling edges~

freebsder

The timing itself is realized by jumping up and down. As for whether it is up or down, it is related to the choice made when it was designed. For example, spi can be both up and down.

lightningguagua

What does this have to do with receiving transmission... It just gives you an option to better adapt the device you want to communicate with...