Great Chip Reading Part 3

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Great Chip Reading Part 3 [Copy link]

 

Three-part world command set

The instruction set (Instruction Set Architecture, ISA) is a bridge connecting software and hardware. The instruction set is a set of commands customized for a specific processor. The earliest instruction set is CISC (Complex Instruction Set Computer) used by X86 series CPUs, which contains more than 3,600 instructions; while ARM and RISC-V use RISC (Reduced Instruction Set Computer)

Among the various instructions in the CISC instruction set, about 20% of the instructions are used repeatedly, accounting for 80% of the entire program code, while the remaining instructions are not often used, accounting for only 20% in program design.

RISC structure gives priority to the most frequently used simple instructions and avoids complex instructions; fixes the instruction length, reduces the types of instruction formats and addressing methods; focuses on control logic, and uses less or no microcode control, etc.

The advantages of the X86 instruction set are as follows:

The instruction compatibility is good. The new generation of instruction sets is perfectly compatible with the previous generation of instruction sets, which means that the compatibility of the operating system is also relatively good. A single instruction is powerful and is conducive to software development. The expansion capability is strong. PCs using the x86 architecture have more peripheral interfaces than mobile phones using the ARM architecture and consumer electronics products using the RISC-V architecture. Instructions are executed sequentially and the control is simple. Processors using the x86 architecture have higher main frequencies and stronger performance.

The disadvantages of the X86 instruction set are as follows:

Compared with ARM and RISC-V, X86 has high power consumption, complex instructions, few general registers, and a cumbersome and bulky instruction system. In addition, there are expensive licensing fees.

The advantages of the ARM instruction set are as follows:

ARM instruction set, streamlined instruction set, unified instruction format, fewer types, fewer addressing methods, simple instructions mean that the corresponding hardware circuits can be optimized as much as possible, thereby improving the execution rate. First, small size, low power consumption, low cost, high performance; second, a large number of registers are used and most data operations are completed in registers, and the instruction execution speed is faster; third, the addressing method is flexible and simple, and the execution efficiency is high; fourth, the instruction length is fixed, and the processing efficiency can be improved through multiple pipelines. The main feature of the A series with clear process ideas is high performance, and its design features are high clock frequency, deep pipeline, and support for NEON instruction set extensions; the main feature of the R series is fast response speed, and its design features are high clock frequency, deeper pipeline, and low interrupt delay; the main feature of the M series is low power consumption and shallow pipeline, which is aimed at low-cost applications such as microcontrollers and embedded systems.

The disadvantages of the ARM instruction set are as follows:

ARM also has expensive licensing fees.

RISC-V is completely open source, has no high licensing fees, simplifies the process, is easy to port, has a modular design, and a complete tool chain. It is in its infancy and its performance is being improved in the later stage.

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RISC-V is mainly aimed at the field of Internet of Things. The Internet of Things is an era of interconnection of all things. It is quite suitable and meets the requirements of independent and controllable domestic CPUs. The prospects are promising.