When a port bit is set to falling edge trigger, and its interrupt enable bit is not set, the interrupt flag is triggered when a falling edge occurs.

一沙一世

When a port bit is set to falling edge trigger, and its interrupt enable bit is not set, the interrupt flag is triggered when a falling edge occurs. [Copy link]

邀请：@maychang   @jimtien   @freebsder   @lugl4313820   参与回复

The problem is twofold:

Set a port bit to falling edge trigger

1. When its interrupt enable bit is 0, will the interrupt flag be set when a falling edge occurs ?

2. When the interrupt enable bit is 0, the falling edge of the port bit will set the corresponding interrupt flag bit to 1. Then when the interrupt enable bit is set to 1, will the program automatically enter the interrupt handler immediately ?

maychang

"When the interrupt enable bit is 0, the falling edge of the port bit sets the corresponding interrupt flag bit to 1. Then, when the interrupt enable bit is set to 1, will the program automatically enter the interrupt handler immediately?"

Yes. But it also depends on whether the interrupt master control bit is turned on and whether there are other high-priority or same-level interrupts being executed.

damiaa

Interrupt enable is a channel that controls whether the channel to the interrupt is opened. The interrupt flag is equivalent to an event. If the channel is opened, the event can pass. If the channel is not opened, it is blocked here. However, the event still occurs. It just fails to pass and generates an interrupt.

秦天qintian0303

This is like a one-way road, with many checkpoints. You have to wait.

harvey2017

There will be a flag bit if there is a falling edge;

With a flag bit and interrupt entry enabled, you can enter the interrupt program

inkinessray

Why do you still ask questions when you can know the answer by just trying it yourself? Oh! That’s not how learning works!

freebsder

1. Yes.

2. Yes.

If I remember correctly, the ARM version is like this, where interrupt loss is prevented. For example, when the RTOS enters the critical section and turns off interrupts for synchronization, an interrupt is generated. The interrupt is immediately restored after leaving the critical section, so that it is not lost. Otherwise, the critical section logic will change.

jimtien

Anyone who has done query mode programming knows it.