MSP430 series MCU-Timer_A realizes PWM

灞波儿奔

MSP430 series MCU-Timer_A realizes PWM [Copy link]

The WM signal is a digital signal with a fixed period and an indefinite duty cycle.
If the counter of Timer_A works in the up-counting mode, the output adopts the output mode 7 (reset/set mode)
to control the period of the PWM waveform using the register TAxCCR0, and use another register TAxCCRx to control the duty cycle (t high level / T period)

Question
Assume ACLK = TACLK = LFXT1 = 32768Hz, MCLK = SMCLK = DCOCLK = 32 * ACLK = 1.048576MHz, use Timer_A to output a PWM waveform with a period of 512/32768 = 15.625ms and a duty cycle of 75% and 25% respectively.

The code is as follows:

#include "msp430x44x.h"

void main()
{

WDTCTL = WDTPW + WDTHOLD;
FLL_CTL0 |= XCAP14PF;
TACTL = TASSEL0 + TACLR; //ACLK, clear TAR
CCR0 = 512 - 1; //Set PWM period
CCTL1 = OUTMOD_7; //Capture/compare control register set output mode 7
CCR1 = 384; //Duty cycle 384/512=0.75
CCTL2 = OUTMOD_7; //Capture/compare control register set output mode 7
CCR2 = 128; //Duty cycle 128/512=0.25

P1DIR |= 0x04; //P1.2 outputs
P1SEL |= 0x04; //P1.2 is the peripheral module TA1
P2DIR |= 0x01; //P2.0 outputs
P2SEL |= 0x01; //P2.0 is the peripheral module TA2
TACTL |= MC0; //Timer_A control register is set to up-counting mode

for (;;)
{
_BIS_SR(LPM3_bits); //Enter low power mode 3
_NOP();
}
}

Display output:

75% duty cycle as shown in the yellow waveform

25% duty cycle is shown in the blue waveform

The 25% waveform is obviously wrong!! But I don't know why! The chip used for simulation is F249, and the code is msp430x44x.h