MSP430G2553 internal ADC principle and routine description

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MSP430G2553 internal ADC principle and routine description [Copy link]

1.1 Overview

The MSP430 microcontroller has a built-in ADC function. Some advanced microcontroller series have ADC12, while low-level microcontroller series have ADC10. The main difference between the two is the resolution. Our G2553 has ADC10 built in.

1.2 ADC10 Features

Up to 200ksps conversion rate;

Fixed 10-bit conversion;

·With sample-and-hold function and optional sampling period;

Conversion can be initiated by software code or TimerA;

·Selectable on-chip (1.5V or 2.5V) or off-chip reference voltage;

Support 8 external input channels;

Internal input channels support temperature detection, VCC and external reference (+, -);

Optional conversion clock source;

Single channel single/multiple, sequence channel single/multiple, a total of 4 conversion modes;

ADC core and reference voltage can be turned off individually;

A data conversion controller (DTC) that supports automatic storage of conversion results;

1.3 ADC10 structure

Figure 1-1 ADC10 structure

1.3.1 ADC10 Core - SAR and Sample-and-Hold Circuit

The two orange areas in the middle, the pentagon on the right is a "10-bit SAR", which means a 10-bit precision successive approximation comparison type ADC core, where the ADC conversion is completed. The "Sample and Hold" in the orange rectangular area on the left is a sample and hold circuit, which holds the external or internal analog signal to achieve signal stability during the ADC conversion process.

1.3.2 ADC10 signal channel and conversion mode

The sample-and-hold circuit can hold the signal in the left selector (red trapezoidal area). Since there is only one SAR, to convert so many signals inside and outside, they must be input one by one in sequence. This selector is used to select the external or internal analog signal to be input. The green rectangle above controls which signal the selector selects and whether it is automatically selected in sequence.

1.3.3 ADC10 clock and sampling trigger source

The ADC10 module, like the TimerA module, also needs clock signal support. With the clock, the SAR successive approximation comparison core can run (because it is successive). Figuratively speaking, the clock is the power of the SAR. We see the blue area, where ACLK, MCLK and SMCLK can be selected. There is also an ADC10OSC, which is built-in to the ADC10 module and has a frequency of about 5MHz. Like TimerA, these clocks can also be divided by a divider. The sampling signal can be triggered by the ADC10SC bit or the three compare matcher outputs of TimerA. And through ISSH, it can be set whether it is an upper edge trigger or a lower edge trigger. Once the sampling trigger signal is issued, ADC10 will immediately select the signal to be sampled from the channel selector and enter the SAR through the sample-and-hold circuit for AD conversion.

1.3.4 ADC10 reference source

The essence of AD conversion is to quantize the external signal (that is, to encode the signal in amplitude). Since it is quantized, there must be a reference standard. The SAR, a pentagonal orange box, has two input terminals, "VR-" and "VR+", which are the reference sources of SAR. Among them, the negative terminal can be determined by SREF2 and input by AVSS (which can be considered as GND) or VREF-/VeREF-. The positive terminal can be determined by SREF0 and SREF1 and input by internal or external reference level. The internal supports 1.5V or 2.5V, and the external is input by external pins. ADC10 also supports outputting the internal reference level to the outside, and in order to maintain its low power consumption advantage, REFBURST can also be used to reduce the average current.

1.3.5 ADC conversion value and DTC circuit

Following the thick hollow arrow below the SAR, you can see a brown-red box "ADC10MEM". This register is used to store the AD value. We can get the AD value by simply reading the value of ADC10MEM. In order to achieve low-power design, MSP430 supports the DTC function, which is the data transmission control function. It can support the automatic storage of data in ADC10MEM to RAM, Flash or other peripherals without CPU intervention.

1.3.6 Temperature Sensor

MSP430 has a built-in temperature sensor (light blue box), which can select the input temperature analog value by setting the input channel to 0x0A. This design allows us to achieve simple temperature detection without an external temperature chip.

12~11-ADC10SHT: ADC10 sampling and holding time

00: 4 x ADC10CLKs

01: 8 x ADC10CLKs

10: 16 x ADC10CLKs

11: 64 x ADC10CLKs

10-ADC10SR: ADC10 sampling rate, this bit is used to select the reference level buffer drive capability at the maximum sampling rate. Setting ADC10SR to 1 can reduce the current consumption of the reference level buffer

0: The reference level buffer supports a maximum rate of 200ksps

1: The reference level buffer supports a maximum rate of 50ksps

9-REFOUT: Reference level output enable bit, used to control whether to output the reference level

0: Reference output off 1: Reference output on

8-REFBURST: Reference voltage output control bit (valid when REFOUT=1)

0: The reference voltage is continuously output

1: The reference voltage is continuously output only during the sampling conversion period.

7-MSC: Multiple sampling/conversion control bit (valid only in sequence or multiple conversion mode)

0: Each sampling and conversion is triggered by the rising edge of SHI

1: The first rising edge of SHI triggers the sampling timer, and the subsequent sampling and conversion are executed immediately after the previous conversion is completed.

6-REF2_5V: Voltage value selection bit of reference voltage generator (valid when REFON=1)

0:1.5V 1:2.5V

5-REFON: Reference voltage generator control bit, controls whether to turn on the internal reference voltage

0: Disable the internal reference voltage generator 1: Enable the internal reference voltage generator

·4-ADC10ON: ADC10 control bit, controls whether to use the ADC10 module

0: Turn off ADC10 module 1: Turn on ADC10 module

·3-ADC10IE: ADC10 interrupt enable control bit, controls whether ADC10 interrupt is allowed

0: Interrupt disabled 1: Interrupt enabled

·2-ADC10IFG: ADC10 interrupt flag. If ADC10MEM is full of conversion results, this bit is set to 1. When the interrupt request is accepted, it is automatically reset and can be reset by software. When using DTC, this bit is set to 1 when a data block is transferred.

0: No interruption occurs 1: Interruption occurs

1-ENC: ADC10 conversion enable bit, used to control whether to convert

0: ADC10 disabled 1: ADC10 enabled

0-ADC10SC: Software controllable sampling/conversion control bit. ADC10SC and ENC must be set to 1 at the same time with one instruction. ADC10SC bit can be automatically reset

0: No sampling/conversion started 1: Sampling/conversion started

1.4.3 ADC10CTL1: ADC10 Control Register 1

ADC10CTL1 ADC10 control register 1
15	14	13	12	11	10	9	8
INCH				SHS		ADC10DF	ISSH
7	6	5	4	3	2	1	0
ADC10DIVx			ADC10SSELx		CONSEQx		ADC10BUSY

15~12-INCH: Input channel selection, used to select the channel for single conversion or the highest channel for sequence conversion. See the table below for details.

·11~10-SHS: Sample/hold input signal source selection bit
00: ADC10SC bit
01: TimerA.OUT1
10: TimerA.OUT0
11: TimerA.OUT2
·9-ADC10DF: ADC10 data format selection bit
0: Binary format (right-aligned) 1: Two's complement format (left-aligned)
·8-ISSH: Sample/hold input signal inversion control bit
0: Sample input signal is not inverted 1: Sample input signal is inverted
·7~5-ADC10DIV: ADC10 clock division selection bit, division coefficient = ADC10DIV+1
·4~3-ADC10SSEL: ADC10 clock source selection bit
00: ADC10OSC 01: ACLK 10: MCLK 11: SMCLK
·2~1-CONSEQ: Conversion mode selection bit
00: Single channel single conversion 01: Sequential channel single conversion
10: Single channel multiple conversion 11: Multiple conversions of the sequence channel
0-ADC10BUSY: ADC10 busy flag, this bit indicates that sampling or conversion is in progress
0: Indicates that there is no conversion in progress 1: Indicates that a sequence, sampling or conversion is in progress

1.5 ADC10 Sampling and Conversion Process

Figure 1-2 ADC10 sampling and conversion process timing diagram

First, our four sampling trigger sources (ADC10SC and 3 TimerA OUT) generate a trigger signal, that is, the SHI signal generates a pulse, at which time the sampling starts and the SAMPCON signal is also set high. Then the sampling clock counts for a period of time. During the counting, SAMPCON remains at a high level. After tsync+tsample time, the sampling is completed. At this time, the sampling stops and enters the conversion phase. After 13 ADC10CLK clocks, the conversion phase is also completed.

1.6 Four Conversion Modes of ADC10 1.6.1 Single Channel Single Mode

This mode samples and converts the single channel selected by INCH once. The ADC result is written to ADC10MEM. When ADC10SC triggers a conversion, continuous conversions can also be triggered by setting ADC10SC. When any other trigger source is used to start the conversion, ENC must be isolated between each conversion, and the sampling signal before ENC is reset and set again will be ignored. The conversion process is shown in the figure below:

1.6.2 Sequential Channel Single Conversion Mode

This mode samples and converts a sequence of channels once. The sequence channel will automatically select INCHx to A0 as the current channel. Each ADC result is stored in ADC10MEM. The sequence conversion ends when the last channel, A0, is converted. When ADC10SC is started once, continuous conversions can also be started by setting the ADC10SC bit. When any other trigger source is used to start the conversion, ENC must be isolated between each sequence conversion, and the sampling signal before ENC is reset and set again will be ignored. The conversion process is shown in the figure below:

1.6.3 Single channel multiple conversion mode

This mode continuously samples and converts the channel selected by INCHx. Each ADC conversion result is stored in ADC10MEM. The conversion process is shown in the figure below:

1.6.4 Sequential Channel Multiple Conversion Mode

This mode repeatedly samples and converts the sequence channels. The sequence channels are the channels selected from INCHx to A0. Each ADC result is stored in ADC10MEM. The sequence conversion ends after the conversion of channel A0 is completed, and the next start signal restarts the sequence conversion. The conversion process is shown in the figure below:

1.7 ADC10 Programming Example 1.7.1 Experimental Description

By writing a program and using the internal integrated temperature sensor, the measured temperature analog signal is converted into a digital signal and displayed on the LCD screen.

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