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[Modelsim FAQ] ModelSim has no timing simulation option [Copy link]

 

Original words from netizens:
After trying everywhere for a long time, I finally solved it - setting - more EDA netlist Writer Settings - Generate nestlist for functional simulation only - off (default on)

Xiao Mei added:
Also, after setting up, it is best to delete the simulation folder in the project directory, and then recompile the quartus project. Otherwise, the gate-level netlist will not be updated and the same phenomenon will occur.

This post is from Altera SoC
 
 

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