Signal Integrity Engineering in High-Speed Digital Circuit Systems

JasonYoo

Signal Integrity Engineering in High-Speed Digital Circuit Systems [Copy link]

Translated from the 1997 high-performance system design conference .
Original author Donald Telian

Abstract
: Unlike a mature discipline, signal integrity engineering methods and practices are not well defined. But there is no doubt that ensuring the integrity of electrical performance is another difficult problem in high-speed digital circuit design. This article summarizes the seven roles that signal integrity engineers should play in the hardware design process, and explains how to correctly apply signal integrity theory, tools and methods to establish new
rules and solve problems in production. This article summarizes some rules and techniques from successful practices for readers.
About the author: Donald Telian is the chief consultant of Cadence Design-systems' Spectrum Scrvices. His main task is to solve the problems encountered by Cadence users around the world in high-speed circuit design.
Text:
This article will explain how signal integrity engineering has become an important part of today's high-speed circuit design system. We first define "high speed" as digital signals above 25MHZ, and not digital signals inside ICs.
This article briefly discusses the changes in system design in the past 10-15 years. The purpose is to show that these changes have led to the emergence of a new type of engineer: signal integrity engineers.
This article will explain that the participation of signal integrity engineers is necessary throughout the entire process of hardware design. This article will summarize the "7 aspects of the role of signal integrity engineers" during the participation process.
(1) Digital system design has three initial aspects: mechanical, logical, and electrical. While the mechanical and logical aspects are constantly changing, the electrical part is also undergoing interesting changes.
The change in electrical design stems from the increase in circuit switching speed. In low-speed systems, such as working at a 1MHz clock, the signal remains unchanged for 95% of the cycle, so most electrical parameters describe static conditions, such as V_in,
L_ol, etc. Today, signals in 66M systems flip with 1/3 of the cycle. These signals are often required to flip before they reach a "static" state. Therefore, new data forms such as IBIS models, RAIL files, etc., and robust and complex simulation tools have emerged to describe these electrical performances.
However, although these techniques are effective, their application and judgment standards in the industry have not yet reached a unified level. A leader of a signal integrity engineering team said: Engineering tends to be well-defined and stable tasks and processes, but now signal integrity engineering practitioners are using insufficient data and unstable processes to produce acceptable results.

(5) So we have to ask, when will we have sufficient data, good tools and correct processes to ensure signal integrity? It is difficult to answer this question now. However, we can get some inspiration from the development of ensuring the mechanical integrity and logical integrity of the design.
Early PCB design relied entirely on manual measurement of distance errors between components and traces, highlighting them, and then manually modifying them. Later, manual measurement disappeared, and the software had the function of automatically measuring spacing and automatically marking errors. This achieved mechanical integrity. Logical integrity has also gone through a similar process, both in PCB and IC design.
Although electrical integrity has not yet reached this stage. But it is certain that in the next few years, signal integrity will become a clear task. Now there are a group of experts working in this field, becoming the earliest signal integrity engineers.

(6) Introduction:
The role of signal integrity engineers in the industry is increasing. In general, this engineer continuously converts data into achievable designs through simulation tools. His job is to find craft solutions when the design process and data types are not yet mature.

(7) This article summarizes the role of signal integrity engineers into 7 items, which are:

1) pioneering and defining 2) Partitioning and Approximating 3) Modeling and Measuring 4) Designing and optimizing 5 ) Quantifying and verifying 6) Reducing and simplifying 7) Correlating and Debugging These 7 items
focus on different aspects of the hardware design process. (8) Hardware Design Process Define new project definition → explore option discussion → Design schematic design → implement layout/fab implementation → Verify proto verification Before mapping the "7 roles" to the hardware design process, let's take a look at what the hardware design process includes. A product must first clearly define what its function is. Next is the analysis of the technologies used and the different implementation methods. During the design phase, various options are carefully organized and analyzed to bring the product to a stage where it can be physically realized. Once the product is finalized and verified, it can be produced . (9) An effective signal integrity project must run through the entire design process, not only in ensuring that the design function is implemented, but also in the product definition phase. For example: PCI cards must have broadband data exchange capabilities. This is the credit of signal integrity engineers, whose research work has increased the commercial bus signaling rate from 8MHZ to 33 (later 66)MHZ. (10) Let's continue with the PCI example. If the conditions required for reliable signal flipping are not deeply understood, developers will spend more time in the debugging phase. Even the PCI card will not work properly at all. Therefore, it must be pointed out that signal integrity engineers should strive to use their technology in the early stage of product design to improve product reliability and enable high-speed products to be brought to market as soon as possible! The resistance we are facing now is that many people still think that signal integrity work is empirical analysis work. In fact, using debugging methods to improve hardware design is a last resort to solve problems. Debugging requires the addition of probes, which is becoming increasingly difficult with the increasing density of devices today, making this empirical analysis more lengthy and boring. (11) However, we must point out that there are usually fewer opportunities for "Pioneering". When a technology requires seven types of work from research to verification, you must have better cooperation with other people, other organizations or even companies to get some opportunities in the earlier stages of the hardware design process. For example: Generally, debugging a noise problem on a PCB does not require cooperation with many people, and such opportunities are also very common. However, research requires sincere cooperation between different organizations to realize some new ideas. (12) Before discussing the 7 roles in depth, let's take a look at the interpretation of the role of signal integrity engineers.





























1) The job of a signal integrity engineer is to add value to the work of the project team. Just like a traffic policeman, his job is to slow people down and avoid accidents.
2) A signal integrity engineer must be able to communicate clearly. He should be able to express the value of his work through vivid 3D models with comprehensive technology. Many engineers only confuse the audience in their speeches, which should be resolutely avoided.
3) Tools alone cannot solve problems. A fool with tools is still a fool. The simulation is not the same as the work is done. You have to know: what it means! Only by giving a reasonable explanation to the simulation results can the value of simulation be realized. Simulation is a means rather than an end.
A senior signal integrity engineer said: I have worked with a group of people who are called experts in the field of signal integrity. Among them, several guys are obsessed with details and have little to gain. These "scientists" want to study everything, and they are meticulous to the nth level of precision in simulation, but they can never get answers in time.
4) In any case, it is better to have data than not to have data. When there is no appropriate model, too much data will restrict your hands and feet. If necessary, make a few assumptions to advance the research.
5) Act in time. When you see something not working properly, deal with it immediately. If you say later: "I told you so", it means that you don't have the ability to solve the problem in time.

(13)
To explain these 7 functions in depth, let's start with the seventh one, "debugging", because most engineers learn about signal integrity engineering through debugging. Unfortunately, some design companies are short-sighted and have not carried out enough analysis work in the early stages of design. It may be that they do not understand some of the additional effects of high-speed circuits, or they have some insights but do not have a better way to solve
the problem .
Although debugging can accumulate valuable experience, some common problems do not have enough instruments and techniques to debug. Many noise spikes require a 2GHZ bandwidth oscilloscope, and the probe must be carefully placed to observe them. A project manager said: When debugging, engineers must pay extra attention to the measurement system, control needle position, etc. A slight mistake will lead to the wrong conclusion.
Now, although good instruments may be available, people are afraid of oscilloscopes. People will choose logic analyzers and throw away oscilloscopes.
A good way is to proactively find problems. Make a test plan, analyze the critical and dangerous signals, briefly touch the probe to the signal, and only check the first 14 cycles of the waveform.
Another way is to build a virtual PCB in a board-level simulator, set up a simulation environment, and use simulation to solve the problems encountered in the laboratory.

(14) The simulation waveform of the simulator is a good reference for actual testing. Now, most commercial simulators have sufficient accuracy. The inconsistency between the simulation results and the actual test often stems from the poor model. At this time, the model must be corrected with accurate testing.
The IBIS model is the simplest way to correct it. Once the model is corrected, it will solve the problem in the next design.

(15)



With this picture, we can find the cause of the problem as soon as possible. There are four manifestations of signal incompleteness:
ground bounce, crosstalk, monotonicity and oscillation. All of these failure modes lead to errors in signal sampling or timing.
First, we must grasp the problem waveform. This problem is often not complicated and can be solved with a logic analyzer. If an oscilloscope is used, the waveform must be observed under different conditions to determine whether the failure mode depends on data changes.
The second more difficult part is to determine the size of the relationship between the data causing the problem and an integrated circuit, so as to distinguish whether it is crosstalk on the PCB or crosstalk inside the IC. Also, when the buses in the IC that share the same power pin are reversed together, the ground pin potential will rise first due to excessive current on the ground pin, which is called ground bounce.
The problem of a single transmission line is relatively simple, and the failed waveforms must be observed repeatedly. These failed waveforms include non-monotonic waveform edges, waveform oscillation, etc., which will cause data discrimination errors.

(16) The meaning of reducing and simplifying is clear at a glance. That is, through analysis, the number of PCB layers is reduced, unnecessary components are removed, and the terminal matching components are simplified.
When setting up simulation, many engineers often add a lot of unnecessary components in the design based on some empirical rules. Many times, analysis shows that many terminal matchings are actually unnecessary.

Reducing components will save a lot of money in materials and production.

(17) Quantifying and verifying
This role is reflected in the implementation link in the hardware design process, mainly in PCB design. If the simplification of a design is done well, then verification will be easy.
Verification mainly relies on simulation tools. Use simulation to verify whether the routing on the PCB is reasonable. Many software combine PCB design and simulation, providing convenience for feedback of simulation results to the design.
Among the four manifestations of incomplete signals, crosstalk must be simulated after PCB layout, while reflection is not necessarily the case. Before routing, some electrical constraint rules can be predefined to drive the automatic router or constrain manual routing.
Verifying whether a routing can work depends on its parameters, such as time parameters, waveform edge monotonicity and overshoot, etc. For industrial products above 33MHZ, PCB routing must leave enough time margin for the signal.

(18) In today's high-speed digital circuits, the delay of PCB routing to the signal has accounted for a considerable part of the signal cycle, with a typical value of 1/3.
The figure above shows a synchronous PCB signal diagram. There are three parts: cycle diagram, schematic diagram and electrical performance diagram. A cycle includes the time from the driver output, the transmission time on the PCB, the setup time at the receiving end, and the clock deviation (CLK slew) caused by the different time when the CLK arrives at the driver and the receiver. The
electrical diagram shows the time difference between the transmission signal and the clock. Several characteristic points are marked on the diagram, and time parameters such as out, prop, and setup are obtained from them. "Out" is defined as the time difference between the driver output reaching a certain voltage and the clock edge for a specific load (here is OPF).
The parameter t_prop refers to the time from the driver sending the signal to the receiving end to get a stable signal. Many simulators can give correct results.
The setup time and clock deviation account for the rest of the cycle.
The task of the signal integrity engineer at this stage is to quantitatively analyze the part of the signal cycle occupied by the PCB.

(19) Designing and optimizing (Designing and optimizing)
This role is reflected in the design stage of the hardware design process. The signal integrity engineer works closely with the project team to provide effective suggestions to ensure that the high-speed part of the design can work properly in the physical implementation.
Before PCB wiring, key networks should be studied. For these networks, the PCB routing method should be studied according to the system environment. If you are not sure at the moment, you should discuss with other people in the project team to try to find a solution. Lack of discussion and communication in the design stage often leads to system performance degradation or even failure.
On the other hand, we can choose I/O buffers to meet the physical topology. Designers often fail to consider the actual situation of the PCB when selecting drivers. For example, in order to meet the requirements of the IC, a sufficiently strong buffer will be selected, but in reality, too much noise will be introduced and the system timing will be destroyed.
Optimizing the pins of the IC can shorten the network length, which is helpful for signal integrity and reducing PCB levels. Optimization also includes considering the number and distribution of power grounds.
It must be noted that a design is not only about how to route on a PCB, it is an organic whole of logical, mechanical and electrical elements. Everyone in the project team must have a "system concept".

(20)



The figure above shows the detailed process of obtaining the PCB topology structure. A successful signal integrity engineer should know how to follow this process in a large system design.
The key to the work is to use the used data to correct the system design rules. (As shown in the middle box in the figure above) Generally speaking, it is easiest to adjust the design from the system aspect.
The key step in the figure above is "Route Topology". A reasonable routing structure can effectively reduce the problem of signal incompleteness and ensure fast and good routing. Engineers should make great efforts in this regard.
Product design must consider the impact of various factors such as I/O buffer, IC timing, system timing, IC pins, final principle design and actual board (floorplan) on an organism. If the routing method is decided at the product implementation stage, the opportunity to optimize the large system environment is lost and a product with excellent functions cannot be obtained.

(21) Now let's look at an example: how to optimize the buffer for a fixed routing structure.
Due to structural limitations, the orientation of the IC on the network results in a set of buses being laid out in a Y shape, causing characteristic impedance discontinuity. Adding terminal matching or changing the network structure may be very costly. Now let's look at the effect of optimizing the buffer.

(22) The ASIC containing this set of address buses has nine different buffers to choose from.
First, let's calculate the signal delay time on each line.
The nine buffers require settling delays ranging from 6ns to 2ns. The saturation current of the buffers ranges from 30mA to 250mA, which means a drive capability of 2mA to 24mA in general ASIC terminals.



(23) Now choose the buffer.
If the system timing allows an 8ns signal delay, buffer No. 1 is the first target. But in reality, 8ns is rare in high-speed circuits.
First, observe the left half of the figure. Here, the improvement in drive capability greatly reduces the buffer settling time. The performance of the network on the buffer is closely related to the buffer drive capability. We call this area "buffer bound".
In contrast, the right half is called "interconnect bounce". The buffer's enhanced drive capability does not significantly reduce the setup time, but the strong drive capability can achieve better results on the transmission line.
Today, there are five or six buffers available. Weaker buffers have high time requirements, while stronger buffers require more space and introduce more noise. The middle buffer is considered.
This example simply demonstrates the valuable help that signal integrity engineers can provide to other designers during the design phase.

(24) Measuring and ModelingMeasuring and ModelingThe
most difficult step in signal integrity analysis is the model. One manager believes that having an effective and accurate IBIS model is the first element for successful signal integrity analysis.
Before design simulation, you must have a sufficient model library. This task is difficult but must be completed.
There are several ways to get the model. Some can be downloaded from the Internet or included in the simulation software. More and more device manufacturers are beginning to provide such models, and some third-party model suppliers are gradually emerging.
However, if you choose a new device in your design, its model is not easy to obtain, and you sometimes have to model it yourself.
Today's signal integrity engineers must be proficient in modeling. Sometimes SPICE models can be converted into IBIS models. Sometimes you have to do the actual measurement yourself. If conditions permit, it is best to use a high-precision curve tracking instrument and oscilloscope. When conditions do not allow, simpler instruments and measurement methods can also work.
No matter what the situation, you must do your best to solve the problem. Strive to use advanced engineering methods and experience to obtain the most accurate data. Don't let the project stop and say: I don't have a model.

(25) The driver of a digital IC generally flips from the power supply voltage (logic "1") to the ground voltage (logic "0"). The output transistor has a nonlinear internal resistance. In the CMOS process, the parasitic diode in the output tube affects the signal flip. The most common is that the IC driver must go through some kind of package before it can be connected to the PCB.

(26) Today's test equipment can accurately measure the driving characteristics of these devices. The oscilloscope can measure the pull-up and pull-down characteristics and embedding characteristics of the device driver. The TDR (time domain reflectometry) system can measure the parasitic parameters of the device package. These data are sufficient to establish an IBIS model.

(27) Partitioning and Approximating
In the research (explore) stage of the hardware design process, signal integrity engineers need to have the ability to "partition and summarize". Sometimes, even though you can work without a signal integrity engineer, you must consider the transmission line structure and operating frequency of the upcoming design.
Clarify the bandwidth requirements of the system. Many engineers are obsessed with broadband capabilities that exceed their needs. At this stage, engineers should be optimistic and think carefully before declaring "impossible". When you are unsure, do some simulation work and generate some raw data based on assumptions.
Use the results for project design in a timely manner. Don't be too obsessed with details and delay time. If others in the project team do not understand you, you should give a full explanation. Engineers should love their team.

(28) Pioneering and Defining
The door to exploration is always open. There are always problems waiting to be solved, new ideas are proposed, simulated, implemented, and compared. The best ideas are always surprisingly simple, proposed from natural phenomena, and reveal new things.
But as mentioned above, you must fully cooperate with practical workers. Many good ideas cannot go deeper because the proposers fail to cooperate well with others.
There is still a lack of constructive work in the field of high-speed digital circuit design. If you have a good idea and continue to study it, you may find that your answer is ready to be applied to the entire industry.

(29) PCI Bus Design Example:
Signal integrity engineers played a key role in defining the PCI bus. In late 1991, the need arose to design a high-performance bus that would be driven directly by ICs, capable of connecting more drivers and at a rate four times higher than the existing bus.
Through many cutting-edge research efforts, we were able to establish a well-defined simulation environment for simulation prior to manufacturing. The system simulation environment was validated and the PCI bus was optimized. The driver description became a model specification. Reflected wave switching became a method of addressing natural phenomena, enabling the interconnect to
be driven directly by a low-power ASIC.



As shown in the figure, how system conditions (impedance) and the IC's characteristic curves (V/I curves) are used to define reliable operation. This process defines a design space for any interface. With key parameters, IC design flexibility is determined.
(In fact, the PCI bus uses another method to define maximum characteristics, not overshoot.)

(30) In this article, we discuss how to apply signal integrity engineering in today's high-speed digital circuits.
To ensure signal integrity, engineers are required to carefully analyze the dynamic operation of digital designs. This aspect of work has not been done enough. Signal integrity engineers have emerged to take on this part of the work. They should become part of the design team. In every stage of the entire hardware design, signal integrity engineers play different roles and make contributions. If the signal integrity work is effective,
we can greatly improve product performance, shorten time to market, and achieve good economic benefits.