How to use logic analyzer to debug SPI anomalies

癸锋

How to use logic analyzer to debug SPI anomalies [Copy link]

As the title says, I recently used a logic analyzer (a pretty cheap one, but it doesn’t make sense that low-speed SPI would have problems, right?) to monitor the SPI communication between STM32F103C8T6 and NRF24L01. I used SPI2, but found that as long as any channel of the logic analyzer is clamped to SPI_CLK, the SPI will not run normally and will not pass the self-test (a prompt statement will be printed after the self-test is successful). Even
if the host computer is not running, it will not work if the connection line is shortened. As long as it is clamped, it will not pass the self-test, and other lines will not be affected. The SPI configuration rate is 256 divided by 140K, which is a rate of 140K. I beg you guys if you have a good solution, I don’t have a second logic analyzer~

(PS: The logic analyzer and the microcontroller share a common ground. Disconnecting the two grounds separately also results in a 0V voltage drop to the ground.)

qiushenghua

All ports of this logic analyzer have 100k pull-up resistors to 5V.

When I use this logic analyzer, I often encounter interference signals that cause it to malfunction.

Usually at this time I will use two 2N7002s to reverse the signal twice and then send it to the logic analyzer.

癸锋

qiushenghua posted on 2019-6-26 19:24 This logic analyzer has 100k pull-up resistors to 5V on all ports. When I use this logic analyzer, I often encounter interference signals that cause it to not work...

I have measured the pin level of the logic analyzer separately, it is 3.3V, not 5V