Help with the synchronization of the power supply LMZ34002

nick02

Help with the synchronization of the power supply LMZ34002 [Copy link]

Using TI power supply LMZ34002, 28V input, -5V output,,, connected 93.1k to AVOUT, but clk input 500k, synchronized,,, help,,

nick02

Can't sync.

nick02

The attached pictures are as follows:

qwqwqw2088

The external square wave clock signal has a duty cycle between 25% and 75%. The clock signal amplitude must be less than 0.5 V and greater than 2.2 V. Before the external clock appears, the device operates in RT mode.

nick02

qwqwqw2088 published on 2019-2-18 11:33 The duty cycle of the external square wave clock signal is between 25% and 75%. The clock signal amplitude must be lower than 0.5 V and higher than 2.2 V. Before the external clock appears...

The clk pin is driven directly by the fpga through a 470pF capacitor.

nick02

Found out that the load of the power supply output was 130 and 100 were connected in parallel.