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CN0162

Analog audio input, Class D output via ADAU1701 SigmaDSP codec, low-power SSM2306 Class D amplifier and ADP3336 LDO regulator

 
Overview

Circuit functions and advantages

The circuit shown in Figure 1 connects an ADAU1701 codec with integrated SigmaDSP® core to the SSM2306 2 W stereo Class D amplifier and ADP3336 low dropout regulator. ADAU1701 has two built-in ADCs and four DACs, so it can process a stereo audio signal and output the separately processed signals to a line-level output and an amplified output simultaneously. In this way, the line output and the amplified output can be processed in the SigmaDSP core with different signal processing methods, such as custom EQ, compressors customized at the chip level for specific outputs, or spatialization effects adjusted for specific speaker configurations. The ADP3336 generates the 3.3 V supply for use by the ADAU1701.

The SSM2306 is an ultra-low idle current and high-efficiency 2 W stereo Class D amplifier that does not require a large external inductor, but requires a minimal number of external components and a small system size. The supply voltage to the amplifier is not provided by the regulator but is obtained directly from the 5 V system supply. The system can provide audio signal processing path output for low-efficiency amplifiers, suitable for systems such as radios, multimedia docking stations or PC speakers.

Figure 1. Class D amplifier connections to audio codec and voltage regulator (schematic diagram, supply decoupling and all connections not shown)

 

Circuit description

The DAC output of the ADAU1701 is connected to the SSM2306 through a resistor and capacitor at each input of the amplifier. A 0.10 μF capacitor and a 13.0 kΩ resistor are connected in series between the ADAU1701 output and the SSM2306 input to implement a 28 Hz high-pass filter. These resistors also set the amplifier's gain to about 6 dB. The full-scale output of the ADAU1701 is 0.9 V rms, so the SSM2306 amplifies it to a full-scale 1.8 V rms (5.09 V peak-to-peak). When the SSM2306's VDD = 5 V, this full-scale value exactly matches the amplifier's clamping level.

This circuit utilizes a multipurpose (MP) pin of the ADAU1701 to control the active-low shutdown pin of the SSM2306. This connection, coupled with a 10 kΩ pull-up resistor, allows the SigmaDSP program to cleanly disable the Class D amplifier without pops and clicks.

The SSM2306's Class D amplifier output remains stable by simply placing a ferrite bead and 1.0 nF capacitor on each pin in front of the speaker.

The supply voltage for the SSM2306 can be obtained directly from a 5 V source, such as a battery, but the ADAU1701 requires a 3.3 V regulated supply, which is generated by the ADP3336. The output voltage of the ADP3336 is set to 3.3 V via the 140 kΩ and 78.7 kΩ feedback resistors. The regulator output can remain stable by placing a capacitor as low as 1.0 μF between the output pin and ground. The 1.0 μF capacitor at the regulator input is used to decouple stray inductance between the board and the 5 V supply. In this circuit, the regulator's shutdown pin only needs to be connected to the input voltage, so that the IC is enabled when input voltage is present.

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Blockdiagram

 
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