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ALCATRAZ (MAXREFDES34#): SHA-256 security authentication design

 
Overview

Smart factory, industrial and medical applications take advantage of the flexibility and high performance of modern FPGAs . As these systems become more interconnected, security issues such as protecting IP, leveraging software to support system features, and preventing counterfeiting have become increasingly prominent. The Alcatraz ( MAXREFDES34# ) subsystem reference design utilizes the DS28E15 to directly implement SHA-256 security authentication on Xilinx® FPGAs. The DS28E15 communicates over a single-contact 1-Wire® bus, reducing the number of pins required for implementation. The reference code defines a hybrid SHA-256 processor and 1-Wire host on the FPGA .

Alcatraz subsystem design block diagram

Figure 1. Alcatraz subsystem design block diagram, including development platform.

characteristic

application

  • SHA-256 security authentication

  • Single contact 1-Wire interface

  • Sample source code

  • Pmod™ Compatible Specifications

Competitive Advantage

  • Strong encryption security authentication

  • Single pin interface

  • With hardware acceleration for fast performance

  • Prevent counterfeiting

  • Peripheral security certification

  • IP protection

  • License and feature management

参考设计图片
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