When doing an LED experiment, the data says that the LED is output through the I/O of the CPLD, but there is no corresponding circuit or data about the CPLD. Baidu said that the DSP controls the IO po
First, take a look at the GPIO block diagram:By looking at the GPIO block diagram, we can get a lot of information:
The DIR register controls whether the GPIO pin is input or output, where the corresp
[i=s] This post was last edited by dontium on 2015-1-23 11:45 [/i] Start with a intensive reading of Texas Online's "Home? Social Media? Analog Technology Controversy? How to Minimize Crosstalk in Cab
Please help me, thanks a lot. According to the manual, there are three situations when IRQ becomes low level, why is mine always high? void TX_Mode(uchar * BUF) { CE = 0; SPI_Write_Buf(WRITE_REG + TX_
I downloaded the interface made in EVC to the target version, and the following error always appears--------------------Configuration: 1485 - Win32 (WCE ARMV4) Release-------------------- Compiling...