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Location:Training / Embedded Development / FPGA / Getting started and improving Vivado (high runner-up) / Logic simulation based on XSim

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Logic simulation based on XSim
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Duration：24 minutes and 12 seconds
Date：2020/07/30

Uploader：抛砖引玉

Introduction

keywords： living TCL xsim

This course introduces in detail the use of Xilinx's new generation development platform Vivado. It is divided into two parts: introductory part and advanced part; it covers four major topics: design process, timing constraints (XDC), design analysis and the use of Tcl scripts; attached Multiple project demos. The design concept of Vivado "IP Centric" runs through it, and the demo shows the powerful functions of Vivado and the differences from ISE.

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