Design of digital camera system with USB interface

    Abstract: The implementation of a digital camera system based on the USB (Universal Serial Bus) interface is discussed. The system uses CYPRESS's EZ_USB series chips and uses its development board to implement a digital camera system. The system fully complies with the USB1.1 protocol and is a new type of multimedia device.

    Keywords: USB camera system I2C bus firmware

As a new expansion interface, USB is mainly dedicated to computer-telephone integration and application consumer products. Its data transfer rate is higher than the standard serial/parallel port. The USB bus has the characteristics of time division multiplexing. Multiple USB peripherals with different speeds can be connected to the same USB port of the same computer at the same time through the hub. When the USB bus bandwidth allows, multiple peripherals can work at the same time without interruption. affect each other. USB transfer rates are suitable for medium and low speed peripherals. In high-speed mode, USB supports real-time video, audio and compressed video data transmission.

In multimedia applications such as video conferencing and video telephony, camera systems with digital interfaces (CAMERA) are key components. It completes the collection and processing of video images, and sends the signals to the computer for further processing through a digital interface.

1 Principle of USB digital camera system

1.1 Introduction to USB

Universal Serial Bus (Universal Serial Bus) is suitable for USB peripheral devices to be connected to the host computer, and is connected to the system bus inside the PC through the PCI bus to realize data transmission. At the same time, USB is a communication protocol that supports data transfer between the main system and its peripherals. In the USB network protocol, each USB system can only have one host.

USB is a layered star topology, the root of which is the host controller, and USB devices are connected according to the interface to implement their functions. If multiple devices perform their functions at the same time, they must be expanded through a hub, but the expansion layer cannot exceed 5 layers. USB devices support hot swapping and can be plug-and-play. USB generally supports two transmission speeds, namely low-speed 1.5Mbit/s and full-speed 12Mbits/s. In the USB2.0 version, its speed is increased to 480Mbits/s.

USB has several methods used for different types of data transfer. Control transmission is mainly used for settings, commands and status information; interrupt transmission is different from the general interrupt concept and is mainly used for large-scale data transmission such as printers and scanners; synchronous transmission is used for real-time transmission of video, sound, etc.

Considering the high USB transmission rate, if a chip that only implements the ENGINE function is used, plus an ordinary microcontroller (such as 8051), its processing speed will be very slow and cannot meet the USB transmission requirements. One of the purposes of USB peripherals as consumer products is to reduce product costs. If a high-speed microprocessor (such as DSP) is used, the transmission rate of USB is met, but the cost is higher. After many comparisons, the built-in microcontroller chip EZ-USB 2131Q of CYPRESS was selected to develop a digital camera system with a USB interface.

1.2 Schematic diagram of the system

The schematic diagram of the system is shown in Figure 1.

The entire system takes EZ-USB as the core and controls the working status of the digital CAMERA chip through the I2C bus control circuit. Digital image data is sent to the data buffer through the data conversion circuit, and the USB bus controller reads data from the data buffer. Communication with the computer is achieved through the USB interface.

2 USB digital camera system hardware

2.1 EZ_USB 2131Q chip introduction

The internal block diagram of EZ_USB 2131Q is shown in Figure 2. It is an 80-pin USB interface control chip with built-in microcontroller from Cypress, including 3 8-bit multi-function ports, 8-bit data port, 16-bit address port, 2 USB data ports and other input and output ports.

The EZ_USB 2131Q chip uses an internal RAM-based solution that allows customers to continuously set up and upgrade at any time, without being limited by the number of ports, buffer size, transmission speed and transmission method.

There is an enhanced 8051 microcontroller embedded in the chip, which is 3 times faster than the standard 8051. It uses internal RAM programming and data storage, which gives the chip soft features. The USB host downloads the 8051 program code and device characteristics into RAM over the USB bus, and then the EZ_USB chip reconnects to the host as a code-defined peripheral.

EZ_USB 2131Q has two synchronous transmission modes: normal reading and writing mode and fast reading and writing mode. In the ordinary read and write mode, the chip's rate of reading or writing data from the outside will not exceed 1000 bytes/ms, and the data transfer instructions can only be listed one by one, and a total of 1000 lines of the same instructions must be written. A loop cannot be used to transfer data in the middle, and there is no time to add other instructions. This method is not advisable for devices that require synchronous transmission and transmit 1023 bytes per frame. In fast read and write mode, the chip can read or write 1023 bytes of data from the outside in 0.5 milliseconds, and there is still enough time to add other instructions.

As shown in Figure 2, the USB transceiver is connected to the D+ and D- pins of the USB bus; the serial interface engine (SIE) encodes and decodes the serial data and performs error checking, bit stuffing, and other signals required to perform USB , and finally complete the data transmission from the USB interface.

EZ_USB-2131Q uses an enhanced SIE/USB interface (USB core), which itself completes many USB protocols, thus simplifying the 8051 code.

2.2 EZ_USB series USB bus simulation board

CYPRESS's EZ_USB development board provides a good tool for the development of USB devices. The development board uses the 80-pin AN2131Q chip and contains 5 pins for expansion interfaces. All circuits on the board are 3.3V, and the development board can be powered by the USB connector or externally.

The EZ_USB development board includes the following parts:

·2131 EZ_USB integrated circuit, which includes a high-performance 8051 core;

·64 extended RAM (consisting of two 32K RAM);

·Two 8051 UART ports;

·DIP switch control to select RAM memory mapping address and EEPROM address;

·Two 8-bit I/O expansion chips for the I2C bus, one is used to drive the seven-segment LED, and the other is used to read the 8-bit switch status;

·A 3.3V regulator, which can convert 5V to 3.3V;

·Power and interrupt/monitoring indicators;

The simulation board is based on the EZ_USB series USB bus controller, which contains standard MCS51 peripheral modules and USB modules. The USB module integrates the USB transceiver, serial bus interface mechanism, functional interface unit and receive/receive buffer. The memory configuration switch can flexibly change the RAM address space and facilitate memory expansion.

The monitoring program resides in the EPROM on the board and can communicate with the PC. The control program is sent to the simulation board through the external UART, allowing real-time simulation. This simulation board and controller fully comply with the "USB Protocol". Use this simulation to complete product development and complete the product based on this. It can improve the product development cycle.

2.3 Digital CAMERA chip

The CODEC of the capture card is OmniVision Inc.'s OV6620. This chip integrates the CMOS light sensing core and peripheral support circuits. It has functions such as programmable control and video analog/digital mixed output. The output video is a color image, consistent with CCIR Standards compliant. OV6620 has two 8-bit A/Ds embedded inside, so it can output 8-bit or 16-bit digital video streams synchronously. While outputting the digital video stream, it also provides the pixel clock PCLK, horizontal reference signal HREF, and vertical synchronization signal VSYNC to facilitate image reading by external circuits.

2.4 I2C bus control circuit

The I2C bus is a bidirectional serial bus with only two signal lines that can be used for communication between different ICs or hardware modules. The two lines are the serial data line (SDA) and the serial clock line (SCL). When connected to the device, each line must be connected to the power supply through a pull-up resistor. Multiple master and slave devices can be connected to the I2C bus. The I2C bus has the characteristics of simple control, stability and reliability. The data amount of the I2C bus is programmable, and its maximum data amount is 100K. Figure 3 shows a complete data transmission on the I2C bus.

2.5 Data conversion and data buffer circuit

The data output rate of the CAMERA chip is high, and the output image data format cannot be directly used for transmission through the USB bus, so data format conversion is required. The data output format of the CAMERA chip is determined by the working mode and is controlled through the I2C bus. In order to simplify the circuit and maintain a certain degree of flexibility of the system, ALTERA's CPLD programmable logic array chip is used to achieve data conversion. The data buffer uses NEC's 256K×8-bit static RAM chip. The circuit diagram is shown in Figure 4.

The main output signals of the CMAERA chip are: CLKOUT (clock output, used as the global working clock of the CPLD chip), Y and UV (video data output lines are 8 bits, used as the data line of the CPLD chip), VSYNC (vertical synchronization signal, used as Frame synchronization signal), CHSYNC (horizontal synchronization signal, used as horizontal synchronization signal).

The data conversion circuit completes the following functions through programmable logic: According to the synchronization signal, for the QCIF format, it filters the redundant data in a row and the synchronization row data in a frame, and generates the write clock signal, write reset signal and write enable of the data buffer chip. can signal. Data filtering is achieved by controlling the write enable signal. When the enable signal is low, the chip can write to the buffer, but when the signal is high, it cannot write data to the buffer.

The data input and data output of the data buffer chip are controlled by different signals respectively, and the two do not interfere with each other. The write data control signals are: WRCLK (write clock signal), WRST (write reset signal) and WREN (write enable signal). The write operation process is: first, control generates an internal reset signal WRST to make the write address pointer of the write buffer point to zero. After the reset period, the write operation is performed; on the rising edge of the write clock signal, if the write enable signal is low , after one clock cycle, the data is written into the SRAM, and the write address pointer of the SRAM is automatically increased.

The read operation signals are: RDCLK (read clock signal), RE (read enable signal), OE (input enable signal) and RDST (read reset signal). The process of the read operation is: control to generate a read reset signal RDST, so that the address pointer of the read buffer points to zero, and the read operation is performed in the next clock cycle; at the rising edge of the read clock, if the RE and OE signals are low at the same time, the SRAM The data will appear on the output data bus, and the SRAM read address pointer will automatically increase.

The read and write operations do not interfere with each other, and each has its own address pointer. The image data output by the CAMERA chip is stored in the buffer according to the agreed requirements, and the corresponding frame interval flag is added. The USB controller reads the data from the buffer and sends it to the host through the interface to complete the processing of the data image. transmission.

3 USB digital camera system software

To develop a USB device, software design is essential. USB application system software design is divided into three parts: USB peripheral firmware (Firmware), client driver on the host operating system, and operation interface program. The interface program communicates with the system USBI (USB Device Interface) through the client driver, and the system generates USB data transfer actions. The firmware responds to various USB standard requests from the system to complete various data exchanges and event processing.

Since the format of the image data itself and USB synchronous transmission are suitable for transmitting large amounts of time-sensitive data, the synchronous transmission mode is adopted. However, the synchronization design of synchronous transmission devices and processes is difficult, and it does not provide an error checking mechanism. Firmware uses interrupts to respond to host I/O requests. Therefore, the IRQE of the 8051 core is key. Also need to pay attention to the initialization and configuration of USB devices. During initialization, each register of AN2131 must be operated in strict order. The host operation interface program is written in VC++6.0 and mainly implements various functions such as image display and image processing.

This system is designed to develop digital camera equipment with USB interface. One of the performance of the system is the frame transmission rate. The data transmission rate of the CAREMA chip can reach up to 30 frames/second. The USB interface currently implemented by the author can reach 8 frames/second in isochronous transmission mode. Due to the current use of simulation mode, the performance of the system can be further improved during the final design.

The next step will be to continue the integration and optimization of the system and ultimately achieve productization. Since the current system is based on the system simulation board, it must be integrated and implemented with the smallest system. In addition, further development of device drivers is required. Since EZ_USB includes many functions, and only its isochronous transmission is used here, a lot of resources are wasted and the cost is increased. Therefore, in subsequent research, USB controllers will also be developed, so as to truly reduce costs and improve performance.