On November 19, the 2020 Beijing International Microelectronics Symposium and IC WORLD Academic Conference was held in Beijing.
The theme of this conference is "Starting with a New Chip, Leading the Future of Chips". At the special forum on "New Generation Memory Technology and Application Development", Deng Biaohua, deputy general manager of Wuhan Jinghong Electronic Technology Co., Ltd., delivered a keynote speech entitled "Memory Chip Testing Technology and Localization Opportunities".
This report mainly analyzes the market status of memory chip testing equipment from three aspects, namely development status, technical challenges and domestic opportunities.
Development status: Testing equipment also faces the problem of "bottleneck"
According to Deng Biaohua, the memory strategic industry mainly includes memory particles, embedded memory, memory modules and pan-memory products, and the memory manufacturing processes mainly include Design House, IDM and Package Test, etc. Generally speaking, after the back-end process, functional testing and performance testing must be carried out. Functional testing generally refers to wafer testing, aging testing and final testing, and performance testing mainly refers to DC parameter testing and AC parameter testing.
Deng Biaohua said that the requirements for IC chip testing are fast, accurate and non-destructive, and the important role of chip testing is process control and yield management.
When talking about the current status of domestic testing equipment, Deng Biaohua said that, like manufacturing equipment, testing equipment is also a "bottleneck" problem restricting my country's IC manufacturing industry. At present, there is no domestic memory back-end testing equipment on the production lines of the most advanced nodes such as SMIC and Yangtze Memory.
According to Deng Biaohua, currently memory test equipment is mainly divided into CP Tester, B/I Tester, FT Tester and SLT Tester, of which CP Tester accounts for 57.69%. According to SEMI forecast data, the global semiconductor equipment market in 2019 was US$52.69 billion, of which the Chinese market accounted for 22.2%. Test equipment accounts for about 8.3% of semiconductor equipment investment, of which Teradyne and Advantest account for 46.7% and 35.3% of China's integrated circuit tester market share respectively, accounting for a total of 82%. Globally, the two companies monopolize more than 85% of the market, basically covering all memory product types and test processes.
Technical challenges: Four major challenges need to be solved urgently
Faced with such "bottleneck" problems in the domestic and international markets, Deng Biaohua said that there are four major technical challenges for memory chip testing equipment, namely "number of parallel measurements: increasing", "signal interconnection: increasing speed", "device characteristics: increasing complexity of test items", and "thermal design: increasing power density".
According to Deng Biaohua, the number of CP parallel measurements has increased to more than 1,000. In order to meet the needs of increasing memory speed and parallel measurements, Probe is gradually evolving from cantilever type to MEMS. The number of MEMS pins has increased from 6,000 to 45,000 to 70,000. In the future, it can support up to 17W+ pins and support high speed, which will be the mainstream pin card for future memory. In terms of technology, since memory chips have more IO and dense pitch Pads, high requirements for flatness accuracy are required, and laser processing will be the mainstream in the future. In addition, due to the high material cost and complex structural design, PCB interconnection has gradually been replaced by high-speed cables. High-speed coaxial cables have the characteristics of flexible configuration of IO resources, good structural guidance tolerance and high-speed performance, and have become the mainstream interconnection method in memory testing.
The challenges faced in signal interconnection are mainly SI design challenges and PI design challenges.
SI design challenges: Higher speed → non-ideal transmission line effects → increased reflections and losses → increased difficulty in signal integrity
PI design challenges: increased dynamic load → increased power network noise → reduced system timing margin
According to Deng Biaohua, the key characteristics test of memory mainly has three characteristics: low cost, high efficiency, flexible controller testing and high performance, high bandwidth.
In terms of automated equipment and thermal design, three key factors are emphasized: DUT temperature uniformity, board-level heat dissipation (high power) and system-level heat dissipation (high density): the DUTs temperature uniformity challenge brought by high parallel measurement numbers and multi-slot plug-in boards; the heat dissipation challenge of high-power single boards greater than 1kW to avoid hot spots; and the leakage risk and reliability challenges brought by high-density system-level heat dissipation and liquid cooling systems.
Deng Biaohua believes that the technical status of memory chip test equipment in the four aspects of BI aging test, SLT system test, FT packaging test, and CP wafer test has several main problems that need to be solved. 1. BI aging test: high parallel test number, low test rate, mainly BIST, lack of high-temperature and high-speed aging test equipment; 2. SLT system test: standard control interface, modular design, high integration; 3. FT packaging test: high test accuracy, full functions, low parallel test number; 4. CP wafer test: the mainstream probe adopts contact type, with low integration and efficiency. The equipment corresponding to these four processes is dynamic aging test equipment, fully automatic system-level test solution equipment, main equipment for post-packaging test, and main equipment for memory pre-packaging wafer performance detection.
Deng Biaohua said that the current technological development trends of memory chip testing equipment are: continuous improvement in interface rate (M-PHY4.0/PCIE5.0/DDR5) and improvement in read and write performance (MRAM/PRAM); continuous improvement in storage capacity (TLC/QLC, 128/192 layers); application of AI in rapid analysis of test results; mainly based on MEMS Probe, supporting PINs above 10w level; equipment integration of BI and FT in some scenarios; complete machines with high reliability, stability and consistency.
Domestic opportunities: Wuhan Jinghong's related technical fields have surpassed its benchmark products
When talking about the opportunities for localization, Deng Biaohua said that memory manufacturing represents a major strategic industry for my country's national information security and economic development. Memory testing equipment is a "bottleneck" problem that restricts the rapid development of my country's memory manufacturing industry. The accelerated upgrade of memory testing equipment is a key issue that needs to be addressed urgently. Wuhan Jinghong was newly established in this context, focusing on memory chip testing equipment manufacturers. At present, Wuhan Jinghong has deployed in all aspects of the field of storage testing equipment.
According to Deng Biaohua, Wuhan Jinghong is a Sino-Korean joint venture. Relying on the financial and technical support of the domestic listed company Jingce Electronics, it has invested about 300 million yuan so far and focuses on chip back-end electrical testing and memory/SoC chip testing. In addition, Wuhan Jinghong has cooperated with the Memory Chip Testing Research Center of Huazhong University of Science and Technology based on the advanced technology of the Korean company in this field. In the cutting-edge technology field of industry-university-research cooperation, after digestion and absorption, it has realized technology transfer and independent development.
It is understood that at present, all performance indicators of Korean memory ATE test equipment have reached the international advanced level, and the products have been used in large quantities in the Samsung/Hynix production lines in Korea, and are mature and stable. Wuhan Jingce display panel test equipment has rich application experience in the fields of test signal and power supply design. Wuhan Jinghong Electronics memory BI equipment has been supplied in batches to Yangtze Memory.
According to Deng Biaohua, Wuhan Jinghong has basically achieved small-scale production in BI testing and CP/FT testing, and will be able to achieve large-scale mass production in the short term.
Finally, Deng Biaohua said that Wuhan Jinghong has made great progress in the field of Burn-in. The relevant products have been put into mass production and have been delivered to Yangtze Memory Technologies, which has also received very good feedback. In terms of achievements in other related technologies, Wuhan Jinghong has achieved certain results in terms of parallel measurement. For example, the latest CP test equipment has exceeded the relevant indicators of the benchmark products, mainly because of the great improvement in single board design. In terms of heat dissipation of the whole machine, through laboratory simulation improvements, there is also an opportunity to gain something in this field. In terms of signal interconnection, research and development are also being increased to strive for breakthroughs in this field.
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