Dai Weimin: Chiplet is a new opportunity for the industry, VeriSilicon will "reduce the burden" on IC design companies

Jiwei.com reported, "As the semiconductor industry has developed to this day, every new model that emerges is related to historical background and industrial conditions. The three shifts of the global semiconductor industry, starting from the military-dominated United States, to the home appliance IDM form of Japan and South Korea, to the foundry dynasty of Taiwan, China, and now to the more fragmented mainland China, all have reasons."

On October 14, Dai Weimin, founder, chairman and president of VeriSilicon, said this at the opening ceremony of IC CHINA 2020.

Dai Weimin pointed out that the fragmentation of the Internet of Things is difficult to resolve, and the largest market for the Internet of Things is in mainland China, which will not be transferred by any will. After the global semiconductor industry has moved to mainland China, Chinese semiconductor companies need to think about how to seize opportunities and meet challenges, and what VeriSilicon needs to do is to provide services for these companies.

Solving industry OPex problems

In recent years, with the continuous advancement of semiconductor technology, the growth rate of the number of transistors on chips has continued to exceed people's imagination and supported the continuous upgrading of mobile phone chip performance.

Under the 16nm process, the number of transistors in Apple's mobile phone chips is 3.3 billion, under the 7nm process it is 6.9 billion, and under the 5nm process it is expected to reach 10 billion. The rapid increase in the number of transistors per unit area has led to a rapid decline in the unit cost of transistors. The production cost of each transistor of Apple's chips is $4.98/1 billion transistors under the 16nm process, and only $2.65/1 billion transistors under the 7nm process.

In contrast to the trend of transistor costs, the cost of chip design is rising year by year. Dai Weimin pointed out that taking the design cost of the process in the mainstream application period as an example, when the process node is 28nm, the design cost of a single chip is about US$41 million, while when the process node is 7nm, the design cost quickly rises to about US$222 million. The cost of early use and mature use is more than doubled, but the cost of mature use is still very expensive.

Source: IBS

"Today's chips are not only cheap, but also fast and low in power consumption, combining all advantages in one. But the problem facing the industry is that there are fewer and fewer companies capable of designing advanced chips, and this capability includes both technology and capital," said Dai Weimin.

In addition, in the past three years, the R&D investment of major global semiconductor manufacturers has accounted for more than 25% of their sales. Dai Weimin emphasized that this means that if a company's gross profit margin is less than 50%, it will have funding problems, and some companies often start selling product lines or even sell the company in the end. This is the R&D cost problem faced by the industry.

"Thirty years ago, the industry's fixed cost (CaPex) problem was solved under the foundry model dominated by TSMC. Today, the industry faces the operating cost (OPex) problem, which is exactly what VeriSilicon is committed to solving." Dai Weimin further pointed out, "Companies do not need to take on all IPs, but only need to focus on core key technologies. Some general IPs can be handed over to chip design service companies such as VeriSilicon, and 'light design' will become the mainstream."

According to Dai Weimin, VeriSilicon currently owns five major digital IPs, including GPU IP, NPU IP, VPU IP, DSP IP and ISP IP; a total of more than 1,400 mixed analog and digital IPs and RF IPs, 124 valid invention patents and 74 trademarks worldwide; 132 registered integrated circuit layout design rights, 12 software copyrights and a rich reserve of technical secrets in China.

Overall, although the "volume" of VeriSilicon's IP sales is not the largest, the "variety" is already extremely rich, which perfectly fits the heterogeneous integrated IP reuse model of chiplets.

Analyzing new opportunities of Chiplet

Dai Weimin believes that among advanced processes, only 22nm, 12nm and 5nm are "long-lived nodes", and the "lifespan" of other intermediate nodes is relatively short. Moreover, not every chip requires a cutting-edge process like 5nm, because not every company can afford the cost of 5nm process, so Chiplet, a new form of mixing dies of different process nodes, is one of the important trends in future chips.

According to the Omdia report, the global market size of chiplet processor chips is experiencing explosive growth and is expected to reach US$5.8 billion by 2024 and exceed US$57 billion by 2035.

In fact, the prototype of chiplet first appeared in 2015, when Marvell founder Dr. Sehat Sutardja first proposed the concept of MoChi (Modular Chip) architecture at ISSCC 2015. However, AMD is currently leading the chiplet industry. For example, the chiplet chip made of 7nm and 14nm shown in the figure below has a cost reduction of about 50% compared to a chip made entirely of 7nm.

"AMD is the company that is best at making large chips. Even it can accept small chips, which is a good proof of the development prospects of Chiplet," said Dai Weimin.

In addition, Dai Weimin also emphasized the importance of packaging and interfaces for chiplets in his speech. TSMC's CoWoS technology and Intel's Foveros 3D packaging technology have laid the foundation for the development of chiplets. In addition, many active devices can be integrated through active interposers, including analog circuits, IO interfaces, physical layers of various interfaces, and scalable on-chip networks.

Interfaces represent standard issues, and chips need to have consistent interconnection protocols when they are spliced ​​together. Therefore, Dai Weimin said that when to enter the chiplet field is critical, because if you enter too early, there will be no standards to rely on, and the designed finished products may face problems such as interface mismatch in the future. Dai Weimin also revealed that a chiplet alliance is being planned in China to jointly participate in the formulation of some relevant standards in the future.

Putting aside other prerequisites, in order to make IP more concrete and flexible to be used in chiplets, VeriSilicon proposed the concept of IP as a Chip (IaaC), which aims to use chiplets to achieve "plug and play" of special function IP from soft to hard, solve the balance between performance and cost in 7nm, 5nm and below processes, and reduce the design time and risk of larger-scale chips.

At present, VeriSilicon's 5nm project has achieved initial results. The design and development of 5nm FinFET chips has begun, the logic synthesis of the NPU IP in the chip design has been completed, and the preliminary simulation results meet the expected goals.

Overall, Chiplet has brought new opportunities to the entire semiconductor industry chain. Dai Weimin pointed out that the chip design link can lower the threshold for large-scale chip design; semiconductor IP licensees can be upgraded to chiplet suppliers, which can enhance the value of IP and effectively reduce the design costs of chip customers; the chip manufacturing and packaging link can add multi-chip module (MCM) business, and the chiplet iteration cycle is much lower than ASIC, which can improve the production line utilization of wafer fabs and packaging plants; the standards and ecology link can establish a new interoperable component, interconnection, protocol and software ecosystem.

The "WuXi AppTec" of the chip industry

In his speech at IC CHINA 2020, Dai Weimin said that an investor vividly compared VeriSilicon to "the WuXi AppTec of the chip industry" because WuXi AppTec does not make drugs, but only does new drug research and development and services; and VeriSilicon also does not make chips, but only provides IP development and design services, so as to avoid competition with customers.

It is worth mentioning that Dai Weimin has also started research and development of "new drugs" for China's semiconductor industry, providing diagnosis and services for the Chinese semiconductor industry.

Regarding the Chinese semiconductor IP market, Dai Weimin said: "Although the design capabilities of domestic companies have caught up, how to achieve independent control of IP is still a key issue. For example, the domestic panel industry is very developed, but the panel drivers are still mostly foreign; although domestic semiconductor manufacturing processes are constantly catching up with the first echelon, high-speed interface IP is still dominated by American companies. Therefore, independent control of IP is crucial to the healthy development of China's semiconductors, and VeriSilicon is committed to this."

Regarding the current situation of IC design companies blossoming everywhere in China, Dai Weimin pointed out: "There are only more than 200 IC design companies in the United States, and mainland China does not need so many. Because the model of 'you eat meat, I gnaw bones, and he drinks soup' has given rise to vicious competition such as price wars, which makes it difficult for all companies to make money. This is unhealthy. The only benefit may be that engineers get experience."

Not only that, in the past 10 years, VeriSilicon has promoted 8 to 10 domestic chips in Songshan Lake every year, committed to finding the best IC design companies in China; in addition, it also hosted the Qingcheng Mountain China IC Ecosystem Summit Forum and the Shanghai FD-SOI Forum, committed to building an industrial chain ecosystem; in 2018, VeriSilicon also established the China RISC-V Industry Alliance as the first chairman unit to promote the development of China's RISC-V industry.

Finally, Dai Weimin told Jiwei.com that there are four levels of enterprise: the first level is to make products, the second level is to provide services and platforms, the third level is to create an ecosystem, and the highest level is to set standards. "We are transitioning from the level of providing services and platforms to the level of creating an ecosystem, and will continue to be committed to promoting the construction of the integrated circuit industry ecosystem in the future."