Introduction and analysis of power consumption reduction technology for plasma TV displays

In early 2009, many domestic and foreign media reported that the EU was going to ban the sale of plasma TVs. Paul Gray, head of the European Television Industry Research Association, denied this, but also mentioned that the association had the following plans.

● Will set minimum standards for the energy efficiency of flat-panel TVs and set maximum limits on energy consumption based on screen size

● It will be mandatory to require TVs to consume less than 1W in standby mode. This requirement will give manufacturers about a year to meet.

It can be seen that although the EU has not actually proposed a motion to ban the sale of plasma TVs, there will still be clear restrictions on the power consumption of such products, including standby power consumption and average power consumption. This forces us to spend a lot of effort on unremitting improvement and research on how to reduce power consumption, improve power factor, and improve luminous efficiency.

So, in what aspects can we start to optimize and improve to effectively reduce the power consumption of PDP? Let's make a qualitative analysis.

1 Power supply

As an important component of PDP, the power supply is required to be highly efficient, small in size, able to provide large transient output power, and have protection functions and the function of starting up in sequence at different output voltages.

Traditional PDP power supplies generally adopt a two-stage solution, namely the power factor correction (PFC) stage + DC/DC conversion circuit topology. They each have their own switching devices and control circuits. Although they can achieve good performance, they are too large, costly, and the circuits are relatively complex. Therefore, optimizing and transforming them has become a research direction for PDP power supply technology.

Analysis shows that, whether from the perspective of energy transmission or volume occupied, the PFC module and the scan drive electrode DC/DC conversion module occupy a considerable proportion. Therefore, the transformation of these two parts becomes a starting point for optimizing the PDP switching power supply.

There are currently two optimization schemes.

● Single-stage power factor correction circuit (SSPFC)

As shown in Figure 1, the small size and simple circuit of SSPFC make it a preferred solution for miniaturization of PDP switching power supply. Its basic principle is: adopting a single-stage power factor correction converter circuit topology, the single-phase AC is connected to the DC/DC conversion unit of the double-tube flyback through two inductive ICS in series after full-wave rectification. In half of the power frequency cycle, only part of the current of the inductor LB works continuously. When the input voltage is an AC sine wave, its input current is an approximate sine wave containing high-frequency ripples. The phases of the two are basically the same, thereby improving the power factor at the input end.

Figure 1 Single-stage power factor correction circuit

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● Use power factor control chip

As shown in FIG2 , a power factor control chip such as MC34262 can be used to perform active power factor correction.

Figure 2 Power factor correction circuit using MC34262

The DC voltage after full-wave rectification of the AC mains is divided and input into one input terminal of the multiplier in the control chip, while the output voltage of the error amplifier is added to the other input terminal of the multiplier. Within a large dynamic range, the transfer curve of the multiplier is linear. The output voltage of the multiplier controls the threshold voltage of the current sampling comparator. When the voltage is greater than this threshold voltage, the inductor releases energy. This threshold voltage is approximately proportional to the input voltage, that is, it is approximately proportional to the DC voltage after full-wave rectification of the AC mains. When the current in the inductor drops to zero, the inductor begins to store energy. Its average current presents a sine wave with the same phase as the mains voltage, which can make the power factor close to "1".

2. Driving circuit part

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The total power consumption of PDP is not only due to gas discharge, because in the driving circuit of PDP, a high-power, high-frequency switching circuit is needed to provide the PDP with various high-voltage pulses required for gas discharge. Although the parasitic capacitance of the PDP display does not consume energy, their charging and discharging will cause energy loss in the circuit resistance and electrode lead resistance.

The voltage amplitude of the PDP driving circuit ranges from tens of volts to hundreds of volts, and the operating frequency is 100 to 233kHz. The design and selection of the driving circuit is particularly important to the picture quality and working efficiency of the PDP system.

In the PDP driving circuit, the address driving circuit has the highest frequency. Therefore, in addition to using energy recovery technology in the address driving circuit, reducing the pulse voltage of the address driving circuit can also significantly reduce the address power consumption. The following methods can be used to reduce the address voltage pulse.

● AwD method - that is, "addressing while displaying". Addressing, sustaining, and erasing pulses are applied together to reduce the addressing voltage, thereby reducing useless power consumption. At the same time, since the sustain time occupies most of a subfield, the frequency of the sustain pulse can be reduced.

● Erase addressing method: after initialization, the light-maintaining stage is entered. When the grayscale level reaches the required level, these units are extinguished through erase addressing. Therefore, a single pixel is addressed only once in each field. Moreover, a lower erase voltage and current can be used to effectively reduce addressing power consumption.

● Changing the working mode of the pulse circuit - that is, making the switching element work in the on or off state (ZVS or ZCS) when the voltage or current of the switching tube is close to zero, can reduce the switching loss of the device itself.

In large-sized PDP display screens, row and column driver ICs consume a lot of power. The power consumption is roughly divided into three parts: logic part, level shift register and high-voltage driver part. Under normal circumstances, the power consumption of the logic part is less than 20mW, and the power consumption of the level shift register part is less than 200mW. The ineffective power consumption of the high-voltage driver circuit caused by the charging and discharging of the screen capacitor mainly comes from the parasitic load in the loop - the loss of the resistance component. The existence of this resistance component is inevitable, but for the electric energy of the capacitor charging and discharging, the driver IC can try to recover part of it by means of a built-in energy recovery circuit.
In order to meet the requirements of the working performance of high-voltage devices and reduce the useless power consumption of the high-voltage driver part, the PDP driver IC needs to take the following more stringent control measures in design and process than ordinary integrated circuits.

● Using SOI process structure, the energy loss can be greatly reduced compared with conventional power modules

● Dielectric isolation is used to prevent crosstalk in the output clamping diode inside the driver IC

● Special treatment is given to the internal component structure and layout, and internal control can eliminate the penetration current during high-voltage switching.

3 MOS tube selection

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Selecting a power field effect transistor (MOSFET) with appropriate parameters can enable the drive circuit to work efficiently and stably, and the life span meets the requirements. The transition of the MOSFET is required to be fast enough to reduce switching losses; the on-resistance is small enough to reduce conduction losses; and the off-resistance is large enough to improve isolation.

Among them, drain-source on-resistance Rds(on), reverse recovery time trr, input capacitance Ciss and total gate charge Qg need to be carefully considered. Low on-resistance helps reduce conduction loss, especially for MOS tubes related to "energy recovery circuit". Low on-resistance helps improve energy recovery efficiency and reduce PDP power consumption. trr, Ciss, and Qg affect the switching speed of MOSFET. Low parameter values ​​can speed up the conversion process of MOSFET and help reduce the switching loss of MOSFET. In addition, low Ciss and Qg parameters can reduce the driving power of MOSFET gate and simplify the design of gate drive circuit.

The gate drive circuit is an external factor that affects the switching loss of the MOS tube. Only when an excellent gate drive circuit is combined with a high-performance MOSFET can a high-performance PDP drive circuit be produced.

4 Phosphor Materials

The phosphors used in PDP are very similar to those used in fluorescent lamps. The main phosphors used in PDP are Y2O3∶Eu red powder, (Gd,Y)BO3∶Eu red powder, Zn2SiO4∶Mn and BaAl12O19∶Mn green powder, and BaMgAl14O23∶Eu and MgBaAl10O17∶Eu blue powder. The decay time of (Gd,Y)BO3∶Eu powder and BaAl12O19∶Mn powder is relatively long, and the decay time of Zn2SiO4∶Mn is even longer for practical applications, so new luminescent materials need to be researched and developed. Phosphor materials directly affect the luminous efficiency and life of PDP TVs. Usually, the life index of plasma TVs refers to the time when the brightness drops to half. At present, a new generation of long-life, high-brightness PDP-specific phosphors have been commercialized.

5 Electrode structure

Increasing the electrode gap to improve the brightness and luminous efficiency of PDP is a very effective measure, but as the electrode gap increases, the required operating voltage will increase accordingly. To solve this problem, a floating electrode F can be added between the sustain and scan electrodes (X electrodes and Y electrodes). The floating electrode does not apply a voltage signal during the unit operation, but a certain induced potential will be generated on it during a single sustain voltage pulse. Since the distance between the F electrode and the X and Y electrodes on both sides is very small, discharge is likely to occur first at these two gaps. Under their guiding effect, a long gap discharge is caused between X and Y, thereby reducing the sustain voltage required for PDP.

6 Others

Including the logic control part, main core board, etc., all need to fully consider the issue of reducing useless power consumption. For example, you can use a gated clock in the logic control part to shut down all internal register operations in the standby state, so as to achieve the purpose of eliminating useless power consumption.

Based on the above analysis, we can see that reducing PDP power consumption can be considered from multiple angles. The correct approach is to take a multi-pronged approach and make progress simultaneously, starting from power supply, driving mode, phosphor materials, discharge chamber structure and new high-voltage technology, in order to achieve the maximum efficiency improvement.