Design of high-definition video codec sample based on prototype verification system

Recently, Beijing Yaco Hongyu Electronics Co., Ltd. released an application design based on its latest prototype verification system "VeriTiger-DH2000T". It integrates design modules such as high-definition video acquisition, H.264 data compression, H.264 data decompression, and 1080P/60Hz video display into an FPGA chip. Combined with the "Prototype Wizard" debugging assistant developed by Yaco Hongyu itself, it greatly simplifies the logic segmentation, module division, and design complexity brought by high-speed and high-throughput data transmission in SOC design.

The digital high-definition video codec and video processing sample system is based on ARM's standard ARM11 processor, external standard 500Mega high-definition sensor acquisition card, SAAIF video processing chip, H.264 codec IP, and high-definition video output IP. It realizes real-time 1080P/30Hz high-definition data acquisition, compression, transmission, and display processing. Yaco Hongyu can provide a complete set of demonstration solutions based on this design.

Figure 1: High-definition video compression/decompression display solution architecture.

With the further improvement of IC manufacturing technology, high-density and high-integration multimedia processing chips emerge in an endless stream. We have studied and analyzed most of the multimedia processing chips on the market. They generally adopt dual-core Cortex A8 (even 4 cores) + multiple 2D/3D GPU + 1080P VP8 + VoIP + ATSC-T/MH solutions, which brings great challenges to the prototype verification stage of chip design. It is well known that the prototype verification solutions on the market generally integrate multiple FPGAs, and the module division method is used between multiple FPGAs to solve the problem of low single-chip verification capacity. In this way, module division and logic debugging will introduce great challenges to the design. Therefore, a single high-capacity prototype verification system becomes very urgent. Since 2010, Yaco Hongyu has invested a lot of design resources to develop VeriTiger-DH2000T, a solution for Xilinx's XC7V2000T.

The prototype verification system of VeriTiger-DH2000T is a prototype verification solution based on the current single ASIC capacity FPGA chip (XC7V2000T), which can provide 4 million ASIC design resources. At the same time, the board integrates PCI-eX8 interface, SATA interface, QSFP optical port module, and a large number of SMA interfaces to facilitate users to implement high-speed serial data application solutions. At the same time, the integrated high-performance, low-jitter clock solution can provide 20Mhz~200Mhz input global clock, and the expandable IO of the HSPI interface provides users with 1320 general IOs, and 546 inter-chip interconnect IOs can meet your logic expansion needs. The onboard Gigabit Ethernet solution provides you with available resources for high-speed PC interconnection.

Figure 2: VeriTiger-DH2000T system structure diagram.

PrototypeWizard software is a prototype verification and debugging tool launched by Yaco Hongyu in 2012. It can be connected to a computer via a USB interface, and can provide users with the following functions: download configuration; HYBUS bus debugging; IO self-test function; serial port debugging function; clock management; power management; SD card configuration management; and board-level temperature detection.

Figure 3: PrototypeWizard interface structure.

With 10 years of service experience in the SOC/IC design industry, Yaco Hongyu Electronics Co., Ltd. can provide you with a complete set of FPGA-based SOC/IC design service solutions, providing strong help for you to shorten the time to market and reduce verification risks.

For detailed solutions on "VeriTiger-DH2000T" and "Digital High-Definition Video Encoding and Video Processing Sample System", please contact the local sales and customer support department of Yaco Hongyu.