TMS320LF2407A is a high-performance 16-bit fixed-point digital signal processor launched by TI in the United States. It uses high-performance static CMOS technology to reduce the power supply voltage to 3.3 V, reducing the power consumption of the controller; the execution speed of 40 MIPS shortens the instruction cycle to 25 ns (40 MHz), thereby improving the real-time control capability of the controller. It is specially designed for digital control, integrating the high-speed signal processing capability of DSP and the optimized peripheral circuit suitable for control, and is widely used in digital control systems; MP3 refers to the third layer of MPEG international standard audio encoding/decoding [1]. This paper adopts hardware decoding (software decoding is expensive and slow) and uses TMS320LF2407A to realize the design of MP3 player.
1 System Hardware Composition
1.1 Microcontroller TMS320LF2407A
The hardware structure of the system is shown in Figure 1. TMS320LF2407A is the main control chip with rich internal resources. It has 40 programmable/multiplexed GPIO pins, event manager EV module, CAN bus module, SCI module and SPI module. Among them, the synchronous serial SPI module has 4 communication pins: master-slave input SPIMOSI, master-slave input SPIMISO, synchronous clock SPICLK, and bus chip select SPISTE. In this system, SD card, VS1003B and TM7843 are all SPI bus interface devices. DSP uses SPI bus to expand SD card and VS1003B audio decoding chip, but does not expand the touch screen controller TM7843 to SPI bus. The IO port simulates SPI solution. The reason is that it is impossible to transmit data to VS1003B while operating the SD card (data has not been read into RAM). SPI is in an intermittent switching state, which will not cause contention and conflict, but touching the screen is inevitable, so the shared bus is unreliable.
1.2 VS1003B decoding chip
VS1003B is a single-chip MP3/WMA/MIDI audio decoding and ADPCM encoding chip produced by VLSI of the Netherlands. It has a high-performance, low-power DSP processor core VS_DSP, 5 KB instruction RAM, 0.5 KB data RAM, serial control and data input interface, 4 general IO ports, and a UART port; at the same time, the chip has a variable sampling rate ADC, a stereo DAC and an audio headphone amplifier.
As shown in Figure 2, the power supply voltages of various parts of VS1003B are different. AVDD (analog circuit voltage) and IOVDD (IO voltage) must be powered by 3.3 V, and CVDD (digital circuit voltage) must be powered by 2.5 V. There are 7 main pins connecting VS1003 and DSP, namely DREQ, SO, SI, SCLK, XRESET, XCS, and XDCS. Only by ensuring that they are correctly and reliably connected to DSP can VS1003 be effectively operated and controlled. During operation, VS1003B can only be read and written when DREQ is high (ready). It has two read and write ports, namely the command port and the data port, which are determined by XCS (command chip select) and XDCS (data chip select) respectively and controlled by the DSP's IO port. SO, SI, and SCLK are SPI interfaces, which are connected to the SPI bus of DSP. The left and right schematic diagrams of Figure 2 are the MIC audio analog signal input circuit and audio output circuit respectively. Since there is a headphone driver inside, the output signal of VS1003B does not need to pass through any power amplifier circuit, which simplifies the hardware circuit.
1.3 SD card circuit
The SD card has 9 pins and supports 2 optional communication protocols: SD mode and SPI mode [2]. As mentioned above, this design uses the SPI mode. In Figure 3, DI, DO, and SCLK correspond to the three pins of the microcontroller SPI module respectively; the CS pin is the chip select pin of the SD card SPI mode, which is connected to the DSP's IO port. The DSP's SPISTE pin is not used (because it is necessary to expand multiple SPI chips and require multiple chip select pins). When operating the SD card, the CS pin is pulled low to avoid conflicts with VS1003B. SENS and WP are the SD card insertion detection and write protection pins respectively.
1.4 Color screen and touch screen drive circuit
ILI9320 is a commonly used color screen controller on mobile phones. It uses a 16-bit parallel bus. The port is mapped to the IO space of the DSP. The color screen has 4 backlight LEDs (the control end is LED1~LED4). The transistor 9012 is connected to the common anode LEDA, so that the backlight is controlled by the PE3 pin of the DSP. If the screen is not touched for a period of time, the PE3 pin is controlled to be high, so that the backlight is turned off to reduce system power consumption. The color screen is closely attached to the 4-wire resistive touch screen. The two screens are a whole. The XR, YD, XL, and YU in the output soft cable (see U3 in Figure 4) are the 4-wire resistive sampling terminals, which are connected to the corresponding pins of TM7843 (chip U4). The DCLK, DIN, DOUT, and /CS pins of TM7843 are connected to the IO pins of TMS320LF2407A to simulate the SPI bus. PENIRQ is the pen down signal. When the program determines that this pin is at a low level (or uses an interrupt method), a touch screen event occurs, and further area recognition processing is performed.
2 Software Design
The software is mainly divided into three tasks: display task, touch recognition task, and MP3 playback task, which are scheduled by the μC/OS operating system. The MP3 playback task completes the most important function, which is to read data from the SD card FAT32 file system and then send it to the VS1003B for decoding. However, the μC/OS system only completes the basic task scheduling and related mechanisms, and has no other embedded practical modules, so the implementation of the FAT32 file system based on the SD card must be designed.
The FAT32 file system is shown in Figure 5. Physical sector 0 can guide the program to locate the correct location of the file system logical sector 0. The first sector of the boot area DBR includes a boot program and a BPB parameter block [3]. The boot area BPB is the most important part of the file system. It records important information such as the number of bytes per sector, the root directory cluster number, and the FAT table number. Based on it, the cluster number of each file can be found. Based on the chain storage structure of the file, all the storage cluster numbers of the file can be found in sequence.
The corresponding structure is designed in the software, describing the BPB block structure, directory structure, file record structure, etc. Among them, the BPB structure is as follows:
struct FAT32_BPB
{
unsigned char BS_jmpBoot[3]; //Jump instruction offset:0
unsigned char BS_OEMName[8]; //System string offset:3
unsigned char BPB_BytesPerSec[2]; //Number of bytes per sector offset:11
unsigned char BPB_SecPerClus[1]; //Number of sectors per cluster offset:13
...
unsigned char BS_FilSysType[11]; //Offset:71
unsigned char BS_FilSysType1[8]; //String ″FAT32″ offset:82
};
Then use the SD card hardware layer API interface function FAT32_ReadSector to read the sector where the BPB is located into the RAM buffer, and use the pointer to point to the internal member to obtain the above information, so that the file location can be located and the data can be read. MP3 usually only reads files and does not perform operations such as deletion and saving. Therefore, in order to improve efficiency and simplify the code, this FAT32 system only implements file location and reading functions. Figure 6 is the main flow chart and the playback task flow chart.
TMS320LF2407A has high performance and rich resources. Applying it to MP3 players improves the overall performance. The touch screen allows users to select songs and drag the playback progress at will, which improves the controllability of the system. The color screen improves the system's display capabilities. The system can not only play audio, but also display full-color BMP pictures, document files, etc., similar to a small PDA.
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