"The 5th Domestic Embedded Operating System Technology and Industry Development Forum" concluded successfully

Author of this article: Xue Shiran, publisher of "Single Chip Microcomputer and Embedded System Application" magazine

The "5th Domestic Embedded Operating System Technology and Industry Development Forum" concluded successfully, focusing on hybrid critical systems to help industrial intelligent systems.

Embedded artificial intelligence is developing rapidly, and the demand for high-performance computing is increasing. In order to cope with the increasingly complex and uncertain external environment, domestic embedded intelligent systems are inseparable from heterogeneous multi-core domestic intelligent chips and domestic basic software that take into account strong real-time and high computing power. Industrial intelligence systems have particularly strong demand for hybrid-critical systems based on smart chips.

Mixed-criticality systems are one of the important directions for the future technological evolution of embedded systems. Currently, some typical applications have been seen in fields such as autonomous driving, service robots, and automotive electronics, and they are showing a positive development trend in fields such as industry and national defense.

To this end, the School of Computer Science of Beihang University, the School of Software of Beihang University, the Hangzhou Innovation Research Institute of Beihang University, the Internet of Things Research Center of China Electronics Technology Standardization Institute, the Embedded System Association, "MCU and Embedded System Applications" 》magazine, held the "5th Domestic Embedded Operating System Technology and Industry Development Forum and Embedded System Association Theme Discussion Forum (the 29th in total)". This forum focuses on the theme of "Research and Application of Hybrid Key Systems for Heterogeneous Multi-core Intelligent Chips". The organizers invited scholars from universities such as East China Normal University, Hunan University, Sun Yat-sen University, Fudan University and Beijing University of Aeronautics and Astronautics, as well as experts from well-known enterprises such as Canaan Technology, Saifang Technology, Huawei and Reside Electronics to participate in the forum theme Lectures and guest discussions on hot topics such as heterogeneous multi-core smart chips and hybrid critical systems. The forum was opened by Hu Chunming, dean of the School of Software at Beihang University. The morning meeting was chaired by He Xiaoqing, secretary-general of the Embedded Systems Association, and the afternoon meeting was chaired by Professor Niu Jianwei from the School of Computer Science at Beihang University.

Forum morning theme: Development of embedded heterogeneous multi-core smart chip industry

Hu Kai, architecture design manager of Canaan Technology Software Department: Exploration and application of Canaan K230 heterogeneous multi-core AIOT chip architecture

Canaan Technology is a company deeply engaged in AI edge-side applications. In the report, Hu Kai focused on the company's newly launched AI chip K230 in 2023. Its application scenarios mainly include door locks, cat eyes, dictionary pens, IPC, etc. Hu Kai said that before chip development, the company had already analyzed the characteristics of these application scenarios and identified these commonalities - the small core system is responsible for the Linux ecosystem, running network/storage/GUI and other control services; the large core system is responsible for Start quickly and run multimedia (audio, video and AI) services; the low-power system is responsible for low power consumption in standby, monitoring wake-up sources, and controlling the normal domain power supply. The development concept of integrating the normal domain power supply into the chip, therefore, the K230 integrates a dual-core CPU with a clear division of labor. And the periphery is equipped with high-speed, low-speed and safety interfaces.

Hu Kai introduced in detail the specific functions and software architecture of each part of the K230 hardware, as well as how the large and small cores communicate. He also introduced in detail the solution to the thorny mutual exclusion problem between the large and small cores.

Zhou Jie, Senior Sales Director of Shanghai Saifang Technology: High-performance RISC-V multi-core computing platform

Saifang Technology is mainly engaged in the research and development of RISC-V IP and chips in high-performance application scenarios, as well as underlying software solutions. It can provide an overall solution that supports multi-core consistent NOC bus, and implement it in self-developed chips to provide RISC -V chip enters high-performance scenarios and provides nationally produced hardware core technology.

Zhou Jie said that compared with other core architectures, the RISC-V architecture has commercial and technical freedom. Therefore, manufacturers that adopt its architecture have the freedom to innovate and it is suitable for all computing systems. At present, most applications are implemented in the Internet of Things (a total of 10 billion units have been shipped globally in embedded scenarios), and they have begun to penetrate into the field of high-performance, multi-core or many-core computing (predicted to exceed 80 billion units in 2025). Sai Fang Technology has been established for 5 years and has launched 4 series of fully self-developed products - Fang﹒ Tianshu (RISC-V CPU IP), Fang﹒ Starlink (Interconnect IP), Fang﹒ Jinghong 7110 (chip) and Fang﹒ Starlight 2 (Single Board Computer), Zhou Jie introduced the characteristics and applications of these products in detail. Zhou Jie especially shared with everyone the first true heterogeneous IP subsystem platform of large and small cores in the RISC-V field launched by Xifang. It can support up to 8-core CPU systems, and in addition to supporting the consistent CPU It can also support I/O consistency. This platform will be verified on Jinghong 8100.

Xie Guoqi, professor at Hunan University and director of Hunan Provincial Key Laboratory of Embedded and Network Computing: Embedded RTOS virtualization technology for mixed-critical deployment

With the improvement of the performance of embedded devices, current complex embedded development has dual needs of rich functions (data visualization, scene visualization) and hard real-time (precise control), and hybrid key deployment based on operating system virtualization technology is to achieve the above dual needs. One of the required solutions. Teacher Xie introduced Zephyr RTOS in detail, which is an open source real-time operating system under the Linux Foundation. It supports more than 13 hardware architectures. It is a product-level application and has released 40 release versions. It has good real-time performance and security. , supports IoT protocols in a variety of embedded scenarios. Teacher Xie believes that Zephyr can be either a macro kernel or a micro kernel, depending on the customer's configuration in the application.

Teacher Xie’s team mainly worked in the following aspects: Zephyr adapted to RK3568, Paddle Lite2.6 adapted to Zephyr3.4, and embedded real-time virtual machine ZVM (Zephyr-based Virtual Machine) development. ZVM is a virtualization software designed and developed by the Provincial Key Laboratory of Embedded Computing of Hunan University. The software is developed based on the real-time operating system Zephyr. It can start the two Guest OSs of Linux and Zephyr at the same time, thereby realizing a mixed kernel on the same hardware platform. deploy. Teacher Xie also introduced in detail the implementation and development plan of ZVM key core technology based on ARM64 and Zephyr RTOS.

Chen Yixiang, professor at the School of Software Engineering, East China Normal University: Optimal configuration method of software and hardware for intelligent embedded systems

Intelligent embedded systems integrate artificial intelligence technology into embedded systems to realize intelligent functions such as identification, judgment, reasoning, and decision-making. Teacher Chen introduced that in addition to completing its functions, an intelligent embedded system also needs to achieve its performance, such as time performance, which stipulates whether the time it must complete its function is 3 s or 3 ms. In addition, embedded systems copy embedded software to a specific chip to run, but the chip has limitations such as area size, and the software that implements intelligence itself is very complex or even huge. Therefore, realizing intelligent functions and performance on a specific chip requires optimizing the configuration of software and hardware, assigning and scheduling which tasks are implemented by software (i.e., CPU), and which tasks are implemented by hardware (i.e., IP core and FPGA). Normally, Software implementation is slow but low-cost, while hardware implementation is fast but costly. How to scientifically allocate software and hardware resources to optimize the performance of intelligent embedded systems under certain constraints (such as time constraints, hardware area constraints, product cost constraints), this is It is a question worthy of study and practice.

Teacher Chen shared some of the research results of the team over the past ten years. First, he introduced the concept of hardware implementation (time) gain, and based on this, he designed multi-core scheduling algorithms for intelligent embedded systems based on genetic algorithms. At the same time, he used convolutional neural networks based on Taking the traffic sign recognition system as an example, the implementation of the traffic sign recognition system on the ZYNQ-7020 scalable processor chip developed by Xilinx Company is introduced.

Niu Jianwei, long-term professor at Beihang University and chief expert of the Ministry of Science and Technology’s key R&D program: Exploration of intelligent industrial robot operating systems and applications

Foreign industrial robot operating systems are relatively mature and are in a leading position in terms of stability, real-time performance and control accuracy. However, they are fragmented and incompatible with each other. In recent years, domestic industrial robots have developed rapidly, but they still face many challenges. Teacher Niu first introduced the importance of developing an autonomous, controllable, real-time intelligent robot operating system for the development of my country's robot industry from the perspective of the development and background of the robot operating system.