A Brief Discussion on DC Voltage Drift in Class AB Audio Power Amplifier Output

This article describes a technique for compensating for DC voltage drift in the output of a direct-coupled Class AB audio power amplifier.

The main benefit of a direct coupled output is improved bass response. Since this design eliminates the need for DC blocking capacitors, its low frequency transfer characteristics are significantly improved.

Capacitor coupled output

Figure 1 shows a capacitor-coupled output where the cutoff low frequency is determined by the load R (typically 8Ω) and capacitor Cc. In this example, capacitor Cc blocks any DC offset that might appear in the output.

Figure 1 The cutoff low frequency of the capacitor-coupled output is determined by the load, capacitor Cc, and the output network.

Direct coupled output

This is not the case in a directly coupled object (Figure 2). Its lower cutoff frequency is not limited by the output, so any fluctuations in the previous stage will cause the DC value to fluctuate, resulting in a DC current flowing through the load (the speaker). In addition to reducing the dynamic range and THD of the amplifier, this is also why a "click" sound is sometimes heard when turning a discrete audio amplifier on or off.

Figure 2 The lower cutoff frequency of the directly coupled output is not output limited.

To correct this problem, we will first perform an in-depth analysis to understand the reasons behind the DC offset of discrete bipolar junction transistor (BJT) audio amplifiers. Next, we will devise a method to eliminate or at least mitigate the problem.

First, create a simple amplifier model, including the main stages.

Simple Model of Amplifier Figure 3. This is a simple model of an amplifier.

As the name implies, the VAS (voltage amplifier stage) is a system element that amplifies the signal from the input, driving the AB stage through a driver stage (usually a common emitter). The driver is connected to the AB stage, which is a complementary emitter follower that provides high current gain. Finally, a negative feedback loop affects the gain of the VAS stage, making the entire system linear and stable.

The VAS stage is usually built using a differential amplifier architecture, where one side receives the input signal and the other side receives the negative feedback signal. For simplicity, let us replace the VAS with an op amp (just to illustrate the offset issue) and analyze the relationship between the stage and the offset, which has been discussed mathematically.

Simplified Amplifier Ignoring the Output Stage Figure 4 A simplified model of the VAS and driver will provide us with valuable insight into the output DC offset.

Figure 4 shows a simplified VAS and driver. This simple model will provide us with valuable insights into the output DC offset. R1 and R2 form a local negative feedback, while Rf1 and Rf2 form a global negative feedback network. The driver, which is typically a common emitter stage, produces a negative gain of -G. For simplicity, the AB stage is neglected because for an emitter follower, the voltage gain is approximately -1.

The VAS gain is determined by the relationship between R1 and R2, R2 >> R1 and Va1 = Va2 = Va. The driver gain is very high, so the overall amplifier gain is determined by the relationship between Rf1 and Rf2:

(Vin-Va)/R1 = (Va-Vo')/R2

Va = Vo ×Rf2 / (Rf2 + Rf1)

Substituting Va and operating, we get:

Vin = Vo × [Rf2 / (Rf2 + Rf1) × (R1 + R2) / R2 + R1 / (G × R2)]

(R1+ R2)/R2≅1 R1/(G × R2)≅0

Vo = Vin × (Rf2+ Rf1)/Rf1 (1)

This isn’t an impressive conclusion, so let’s analyze the relationship between Vo and the voltage on the driver input Vo (referenced to ground):

Va1 = Vo'×R1 / (R2 + R1) Va2 = Vo × Rf2 / (Rf2 + Rf1) Va1 = Va2

Vo = Vo'×R1/(R2+R1)×(Rf2+Rf1)/Rf2(2)

This last equation is very important because it shows the relationship between the DC voltage of the driver stage and the output DC voltage of the amplifier, indicating that small fluctuations in Vo will produce large shifts in Vo.

As mentioned earlier, the driver stage usually consists of a simple common-emitter stage (Q3 in Figure 1) and a small resistor (Rpol) that fixes the required base-to-emitter voltage. This transistor provides the base current for the output transistors, so it is not uncommon for the collector current of this stage to be in the milliamp range.

Let's forget about the effects of temperature for a moment, so when we first turn on the circuit we calibrate VAS so that the output DC voltage is halfway between VCC and VEE, zero volts. If no signal is applied, since the AB stage is a voltage follower (common collector), driver transistor Q3 holds most of the VEE voltage (VEE-VBE), so a bias current IBias flows through Q3, so Q3 dissipates approximately the power determined by:

PQ3≅VEE× IBias

This power is heating Q3, and this heat is changing the Vbe of the device at a known rate of -2.2 mV/°C, thus changing the previously adjusted output DC voltage.

If the transistor starts to heat up, say 40°C above ambient, its Vbe will drop by about 88 mV.

This smaller Vbe that occurs as the transistor temperature increases requires a corresponding change in Vo' (the voltage explained earlier) at the output of the VAS, producing a DC voltage shift at the output.

A real example

The circuit in Figure 5 illustrates what has been explained so far.

Temperature drift compensation circuit Figure 5 This is a first order practical implementation of the circuit.

To keep the offset low, it is convenient to set Vo as close to zero as possible. This is the purpose of Rset, which stands for multi-turn fine tuning.

Here, the relationship between the reference voltage and Vo' is:

Vo'=Vbase × (Rpol + Rset)/Rpol

Therefore, the output voltage drift based on the base-emitter voltage change is:

Vo = Vbase × (Rpol + Rset) / Rpol × R1 / (R2 + R1) × (Rf2 + Rf1) / Rf2 (3)

From this equation we can calculate how much the output voltage will change for every °C change in drive voltage, if we assign values ​​to the components (taken from real amplifiers) such as:

Vo = -2.2mV/°C × (120 + 4K) / 120 × 470/ (15K + 470) × (2K2 + 10K) / 2K2

Vo = -12.8 mV/°C

PQ3≅24V×5mA=0.12W

Assume that Q3 is packaged in TO92. In this case, the junction temperature increase can be calculated using the junction-to-ambient thermal resistance of this package:

Rθja=200°C/W

ΔTemperature = 200°C / W × 0.12W = 24°C

ΔVo=24°C × (-12.8 mV/°C)

ΔVo=-305mV

In summary, if no compensation is applied, the output will drift by approximately 305 mV. This only takes into account the self-heating effects of the transistor. If the ambient temperature increases for any reason, this offset may increase.

How to mitigate this effect

The base-emitter voltage of Q3 is fixed by Rpol, so one way to compensate for the change in Vbe voltage is to make Rpol follow this change in some way. This can be achieved by using a temperature-dependent resistor (like Rpol) connected to the transistor (like a thermistor). Since the rate of change of Vbe is negative, the thermistor must be an NTC.

Let's calculate the required thermal coefficient for Rpol:

IRpol (which can be considered constant) flows through Rpol, and Vbe is equal to VRpol:

Rpol = Vbe / IRpol

(dRpol)/(dVbe) = 1/IRpol

ΔRpol=1/IRpol×ΔVbe

In our example, Rpol = 120Ω and IRpol = 5.6mA, therefore:

ΔRpol= 1 / 5.6mA × (-2.2mV/(°C))

ΔRpol=-0.4Ω/(°C)

We need to find a thermistor with an exact thermal coefficient and resistance value at 25° C. Since this is not possible because most NTC thermistors have a much higher temperature coefficient, the solution is to connect one or more higher value thermistors in parallel with Rpol.

Here is the equation that models the temperature dependence of a thermistor:

Rth = Rth0 × eB(1/T-1/T0),

Where Rth0 is the thermistor resistance at ambient temperature (what we want to calculate), B is the parameter, usually 3400°K, T is the absolute temperature, and T0 is the ambient temperature, which is about 298.16°K.

Therefore, the slope at ambient temperature can be calculated as:

(dRth)/dT = (-B × Rth0 × eB(1/T-1/T0)/T2)

This is the rate of change of resistance per °C:

(dRth)/dT = -38.24e – 3 ×Rth0 [Ω/(°C)]

Thermistor in parallel with Rpol:

R || = (Rth × Rpol)/(Rth × Rpol),

and:

dR || / dRth = Rpol2/(Rth0 × Rpol)2

This gives us the change in parallel resistance:

ΔR||= Rpol2 / (Rth0 ×Rpol)2× ΔRth

and substitute the thermistor resistance increment per °C:

ΔR||= Rpol2/(Rth0 ×Rpol)2×(-38.24e – 3 × Rth0 [Ω/(°C)])

We can now calculate Rth0 for the example we are analyzing:

-0.4Ω/(°C) = 1202 / (Rth0 × 120) 2 × (-38.24e – 3 × Rth0 [Ω/(°C)])

Rth0 = 1.12KΩ

For practical purposes, the value of the thermistor can be rounded to 1.2KΩ.

Precautions

The thermistor should be much smaller than the transistor so the temperature of the thermistor will be equal to or very close to the temperature of the transistor case. This will also reduce thermal inertia, allowing the system to reach steady state faster. A thermal adhesive should be used to attach the thermistor to the transistor case.

Testing concepts

To determine how accurately this concept models the real-world behavior of the circuit, I constructed a test circuit. Since there were no 1.2KΩ thermistors (NTC 0402), I connected eight 10KΩ thermistors (0402 Murata NCP15XH103D03RC) in parallel (Figure 6) to produce a very similar value (1250Ω). Note that connecting thermistors in parallel does not change the temperature coefficient we calculated.

The temperature sensor in Figure 6 is a 1.25KΩ thermistor made from eight 10KΩ thermistors connected in parallel.

I then used thermal adhesive to attach the sensor to the flat side of Q3 and connected it in parallel with Rpol (which is an SMD resistor on the other side of the board).

Mounted Sensor Schematic Figure 7 The thermistor shown in the previous schematic (Figure 6) is thermally bonded to Q3.