Methods and techniques for selecting suitable DSP components for low-power design

Many embedded processors claim to have the lowest power consumption. However, no single component can maintain the lowest power consumption in all applications, because the definition of low power is application-dependent, and a chip design that works for one application may cause problems for another application. Portable applications often define low power consumption based on battery life, and these applications have a wide range of functions and operating modes. If telecommunications system components are to meet the application power requirements, they must handle the required number of channels within the power budget, while dissipating power through the package and circuit board to ensure that the component remains within the rated temperature range; in addition, these infrastructure applications also pay attention to power consumption under maximum load conditions. Therefore, in order to achieve power requirements, DSP suppliers will select the most appropriate component process, circuit design, voltage and frequency operating points, and overall architecture for the target application.

Power saving technology

DSP vendors have many techniques they can use to reduce power consumption and achieve performance goals, including:

●Choose the appropriate process;

●Transistor design technology;

●Choose the correct operating frequency and voltage;

●Choosing the right architecture, including integration level, memory architecture and processing unit;

●Use highly heat-dissipating packaging to ensure components remain within specific operating temperature ranges.

Power consumption sources

Regardless of the application, component power dissipation comes from several sources:

Leakage power

The leakage power consumption of a component is a fixed value and is not affected by the processor action or operating frequency, but it changes with the process, operating voltage and temperature. The leakage power consumption of a low-precision (low geometry) process will tend to increase exponentially with voltage and temperature.

Clocking power

The clock power consumption of a component is proportional to the clock frequency. Most of the chip area of ​​a highly integrated component is used for synchronous components such as memory or registers. If the clock architecture is poorly designed, the power consumption of the component will remain unchanged regardless of the actual workload.

Active power

Pertaining to the actual system function that the component is performing at the time.

In addition to the above sources, component power consumption is also affected by two major factors:

Component current

The higher the device current, the faster the battery power is consumed, and sometimes the power budget is exceeded, causing the supply voltage to drop, causing the device to leave the normal operating area and cause errors.

Component/system temperature rise

If the heat cannot be dissipated effectively from the component, its temperature may exceed the rated range and cause operational errors.

The following optimization techniques will address the various power consumption issues mentioned above in different ways.

Select the appropriate process

To optimize performance and power consumption for different applications, Texas Instruments (TI) offers a variety of process types. For example, TI's 130nm low-leakage process has almost no leakage current when operating at 1.5V. For portable applications where the DSP is mostly idle, this low-leakage process can help them save power. Another high-performance process has higher leakage current but can operate at 1.2V. Devices using this process can achieve twice the MHz performance of the low-leakage process. In infrastructure applications that place more emphasis on maximum active power, this high-performance process is more competitive than the low-leakage process for two reasons: First, the operating frequency of the low-leakage computing processing unit is only half that of the high-performance process, which means that the number of them must be doubled to provide the same performance, but this will increase the cost of the device. Second, because power consumption is proportional to the square of the voltage, under the same conditions, the operating power consumption of the high-performance process is only (1.2V/1.5V)2 or 64% of the low-leakage process. Since low operating power consumption is often more important than low leakage power consumption for infrastructure applications, high-performance processes are the best choice for such applications.

Transistor Design

Transistors of the same process can also have different switching threshold voltages (VT). For example, low-VT transistors switch faster, while high-VT transistors have less leakage current. The chip only needs to use low-VT transistors in the parts that affect the speed, and other circuits use high-VT transistors to save power. Designers' component databases should include basic logic gates (NAND, NOR, INVERT, etc.) composed of high-VT and low-VT transistors. Sometimes they also use transistors with intermediate threshold voltages (middle-VT). Generally speaking, logic gates composed of high-VT transistors should be used as much as possible unless important performance requirements are to be met.

Component operating points: voltage and frequency

Several ways of clocking components can save power:

●Multiple clock domain;

●Dynamic frequency scaling;

●Clock gating.

In addition to the clock, adjusting the voltage can also reduce power consumption:

●Static voltage regulation;

●Dynamic voltage/frequency adjustment;

●Multiple voltage domains.

Multi-Clock Domain

Clock domains are parts of a device that use the same clock frequency. Dividing a chip's circuitry into multiple clock domains allows each part to operate at the most appropriate speed, thereby saving power. For example, a high-performance DSP may need to operate at 1GHz, but the serial port connected to the stereo codec interface only needs a speed of 12MHz. Although multi-clock domain design still requires synchronization circuits and bridge circuits to allow signals to cross different clock domains, it can significantly reduce overall power consumption.

Frequency Adjustment

Certain clock domains of a component may have different operational requirements at different times. For example, if a processor only has 10% of its computing requirements at a certain time, reducing the clock frequency to 1/10 of the normal frequency can significantly reduce clock power consumption. The design of dynamic clock adjustment circuits must be very careful to ensure that the synchronous logic circuits receive a stable, non-jumping minimum duty cycle clock. Frequency adjustment is most helpful for battery-powered applications.

Clock Gating

Clock gating cuts off the clock to idle circuits. The simplest approach is sleep mode, which allows the user to shut down part of the chip using software. Other technologies automatically shut down the clock to certain parts of the component until they are needed. For example, the Ethernet media access controller (MAC) can be in sleep mode until it detects a network and starts working. Clock gating is also suitable for all battery-powered applications, just like frequency scaling.

Static Voltage Regulation

If the application has lower performance requirements, the device can also operate at a lower voltage. For example, if the DSP is running at 720 MHz at 1.2V, it can also operate at 600MHz using 1.1V. Since power consumption is proportional to the square of the voltage, the power consumption of operating at 600MHz at 1.1V is only (1.1V/1.2V)2 of the power consumption of 720MHz, which is about 84%. In addition, the operating power consumption will be reduced by 20% due to the reduction in clock frequency.

Dynamic voltage/frequency scaling

This technique allows the voltage to decrease as the frequency decreases to further save power. The switching of frequencies must also be done very carefully, the component should first cut off the clock and then change the operating voltage.

/Frequency adjustment technology is very suitable for portable applications. [page]

Voltage Domain

The concept of multiple domains also applies to voltage. Designers can divide the chip into multiple parts according to performance requirements, and each part uses a different voltage. Since different voltage domains must be separated by isolation circuits to protect them from damage from other voltage domains, this technology must be used with caution when designing. They must also provide conversion circuits to convert signals across different voltage domains. Multiple voltage domains require multiple sets of power supplies, but the efficiency of the built-in regulators of the chip is usually not as good as the power supply at the circuit board level. Therefore, this type of design often requires multiple sets of power supplies to be supplied by the circuit board. This is one of the disadvantages of multi-voltage domain technology: because the circuit board needs to add multiple power layers, the design complexity is greatly increased.

Power supply gating

Power gating goes one step further than clock gating, and it directly cuts off the power to the idle circuits on the chip. Because this technology is more complex and requires isolation circuits, it is usually used on a larger scale (mostly on a module basis) than clock gating (on an individual circuit basis). This technology is also different from multi-voltage domain technology, and its isolation circuits are built into the chip to avoid increasing the complexity of circuit board design.

Application areas of operating point technology

Whether the above techniques are useful depends on whether the user judges the application system based on battery life or maximum power consumption. Some techniques are helpful in almost all applications. For example, multiple clock domains and multiple voltage domains only require clock frequency and voltage, so any application system can use these two techniques. The number of domains is only limited by the design complexity introduced by these techniques. Multiple voltage domains may also be limited by the complexity of the circuit board. Similarly, most component circuits are not operated under maximum load conditions, so clock gating techniques (especially those using automatic control) can be useful in many applications. Static voltage regulation is beneficial to all applications because the component only operates at the necessary voltage to provide the required performance.

Frequency scaling and dynamic voltage/frequency scaling techniques are most useful for battery-powered applications that offer multiple modes of operation; on the other hand, these methods are less useful for applications that value maximum power consumption. In addition, power gating may not be helpful for these infrastructure-like applications, where components rarely have large areas of circuitry sitting idle.

Choosing the right architecture

Another approach to tuning application power consumption is to choose the most appropriate functional integration level, computing processing unit and memory architecture.

Peripheral and memory integration

Components and external parts need to transmit signals to each other through the circuit board, which may be the main source of system power consumption. This is because transmitting signals through the circuit board requires a higher voltage than the chip functional integration, and the parasitic capacitance of the circuit board signal line will also cause power consumption.

Adjustment of the processing unit

Modern components based on system-on-a-chip can choose different types of computing processing units:

DSP

Processors that specialize in executing signal and image processing algorithms have multiple application-optimized hardware arithmetic logic units and multipliers built in, which can execute standard signal processing algorithms with extremely high efficiency. These components have complete programmability and can easily support new standards that will emerge in the future.

General Purpose Processor

ARM processors are an example of processors that are used to perform general functions such as graphical user interfaces, network stacks, and overall system control. Since they do not have to integrate the processing units required for DSP functions, they consume less power when performing general functions.

Special purpose hardware coprocessor

Contains only the arithmetic units and control circuits required for a specific function. If the application function is well defined and unlikely to change, the function can be integrated into the hardware coprocessor. For example, a DSP that integrates Viterbi and Turbo processors can be specifically used to perform forward error correction (FEC) required by the 3G base station standard.

Today's SoCs will most likely integrate multiple types of CPUs. Some architectures use multiple different types of CPUs and assign different functions to the most appropriate core. DSPs can perform signal processing efficiently, while RISCs are suitable for handling tasks such as system control and user interface. Because each CPU performs the task it does best at the speed required, power consumption can be minimized; in contrast, if only one CPU performs all functions, its clock frequency must be higher and it must also contain more hardware, some of which may be idle frequently. In other words, this type of design is bound to be less efficient, and in the case where efficiency is equal to power efficiency, its power consumption is bound to be higher.

Memory system selection

If the components want to avoid accessing external memory, they can also integrate all the memory required by the application into the chip. However, applications such as video or imaging systems require extremely large amounts of memory, and the cost of integrating them all into the chip may far exceed the cost of directly adding DRAM to the circuit board. Such applications can use cache architecture to reduce the number of accesses to external memory and reduce the total power consumption of the system.

Even if a device contains all the memory it needs, caches can help reduce power consumption. Such devices can wire a small amount of first-level cache memory directly to the processor, which stores the most frequently used contents of main memory. Main memory is second-level memory, which is usually slower and uses blocks that use less power than first-level cache. Since most processor accesses hit first-level cache memory, which uses smaller capacitors, each access consumes less power. [page]

Packaging and Power Consumption

All of the aforementioned power-saving techniques can help components generate less heat, and packaging can further enhance their effectiveness by efficiently dissipating heat.

Heat sinks are not suitable for portable applications with limited space, and their height or cost may exceed the acceptable range for plug-in modules or automotive applications. In contrast, metal heat sink covers or heat sink layers increase component cost but provide higher heat dissipation efficiency. Some components also connect heat sink solder balls to the component's heat sink ground plane, which achieves better heat dissipation through the circuit board.

Choosing the right technology

Battery-powered applications

Portable or handheld applications place the greatest emphasis on battery life, but the way portable applications use the battery varies greatly. Portable products have many different operating modes that designers must take into account to maximize battery life.

MP3 player

Since song downloading only accounts for a small part of the playback time, most of the power of these products is used for song playback. In order to minimize standby power consumption, they will automatically shut down after a period of time. MP3 players must decompress the music in real time to avoid data loss and various noises. The performance requirements of MP3 players are much smaller than other applications such as video processing or broadband communications, so low-power DSPs are most suitable. These components usually use low-leakage processes because leakage is still the main source of power consumption. They can also use frequency adjustment technology to reduce the component's clock frequency according to the decoding performance required by the song.

Digital Camera

These products have multiple modes of operation, including:

(1) Standby mode with automatic shutdown;

(2) Preview mode (waiting to take a photo);

(3) Photo mode (actually taking photos and processing and compressing images);

(4) Video recording mode (some cameras have this function).

The screen of a digital camera is sometimes turned on for a long time, but the DSP actually performs image compression for a short time. Digital cameras must perform many real-time processing operations in both preview mode and shooting mode. In preview mode, the latest image must be displayed continuously, and in shooting mode, the photo processing and compression must be completed as soon as possible in order to continue taking the next photo, thereby minimizing the delay time between two shots. This DSP contains a variety of different computing processing units:

●ARM7 core, responsible for system control functions and user interface;

●TMS320C54x processor;

●SIMD image processing engine (iMX), providing programmable image processing functions;

●Variable length coding and decoding (VLC/VLD) co-processor, responsible for image and video compression and decompression;

●Preview engine, real-time display of preview image and digital zoom.

It also has a high degree of functional integration, which can reduce product size and system power consumption:

●Multi-purpose OSD function;

●Color LCD digital interface;

●CompactFlash, SmartMedia, Secure Digital and Memory Stick memory card interfaces;

●Multi-channel 10-bit digital-to-analog converter, responsible for providing NTSC/PAL composite video output;

●Multi-channel serial audio Codec interface (McBSP);

●The chip has built-in USB 1.1 function controller.

Such devices can select certain functions that are rarely used and then cut the clock signal when they are idle. For example, the iMX and VLD/VLC function blocks may not be needed in preview and standby modes, and the power to the USB interface can be turned off when the camera is not connected to the PC.

Mobile Phone

Standard mobile phones have two power modes:

(1) Standby mode waiting for a call;

(2) The actual call mode of making a call.

When in standby mode, the modem function (while waiting for a call) operates in a low-power mode, and the application function (digital voice encoding and decoding) can be completely powered off. When the phone enters talk mode, the modem function and application function operate in a higher power mode. Low-power processes are already able to meet the processing needs of these phones, so many products use this process to save power. The net power consumption of the product is related to the time occupied in each mode. They can also use voltage and frequency adjustment techniques to adjust the power consumption of components according to the operating requirements of the operating mode. Advanced mobile phones have also added digital cameras, MP3 and video recording functions, so their operating modes have become more and more. To support these operating modes, mobile phones usually use a heterogeneous architecture composed of different types of processors. The signal processing functions required by applications such as modems and cameras are performed by DSPs and hardware accelerators dedicated to each operating mode. The DSP is then paired with a RISC processor responsible for user interface and system control functions. If the accelerator functions are not used in a certain mode, the system can also cut off their voltage or clock. For example, when the user interface is not needed in standby mode, the power of the RISC core can be turned off.

Portable applications may employ various power saving techniques as necessary to minimize power consumption during critical operating modes.

Infrastructure Systems

Wireless and wired infrastructure for devices such as voice over IP (VoIP) or base station transceivers are “plug-in” applications that must operate within different power constraints. Some systems add new functional units or channel capacity to a rack with fixed power supply and system cooling capabilities, and these systems must often continue to operate normally even if the room air conditioning system fails. The total power consumption of each rack cannot exceed the power supply capabilities of the existing power supply, which provides power to the circuit boards in the rack, and each circuit board distributes power to different components on the board. As semiconductor components become more sophisticated, chips can also increase operating frequency or build in multiple DSP processors to support more channels. On the other hand, the ever-shrinking circuit structure requires more power consumption from the chip, so it becomes more important to improve the heat dissipation efficiency through the package. Because these systems must be very reliable, the analysis of their power and cooling requirements should take into account the situation where all processors are operating at maximum load.

To reduce power consumption at full load, these systems will likely use high-performance processes that operate at lower voltages, with multiple clock domains and clock gating techniques that are useful for any application. These systems will not use multiple voltage domains to reduce power because they contain a large number of densely packed processors, which would significantly increase board design complexity. Static voltage scaling helps save power, and since power consumption scales with the square of the operating voltage, these designs will choose a lower operating voltage. These devices can also integrate more cores to make up for the lack of performance of some cores running at a lower frequency, for example, instead of using four 300MHz cores running at 1.2V, it is better to use six 200MHz cores running at 1.0V, because both solutions have the same MHz performance (and channel processing power) of 1200MHz, but the power consumption of the latter is only (1.0V/1.2V)2, or about 69%. Most of the die area of ​​these devices is used for internal memory, mainly data memory. Because the data memory required for each chip is also a fixed value under a specific channel processing density, and most of the memory is directly allocated to each core for use, adding cores will not cause a proportional increase in the total chip area, and the low power consumption advantage brought is enough to offset the additional cost.

Power consumption optimization must meet application requirements

Different DSP application devices require different strategies to meet their needs. For example, infrastructure systems want to reduce power consumption under maximum load conditions, while portable applications want to minimize battery power consumption. Their needs are obviously very different. In fact, even the same type of applications may have very different requirements. For example, different portable applications must adopt different power optimization technologies to meet their respective operating requirements. If semiconductor manufacturers want to serve various markets, they must master a variety of process, design and architecture technologies to provide the most suitable components for target applications.