Application of MCU+CPLD structure system in electronic design

Since the introduction of single-chip microcomputers into my country in the 1980s, the craze for learning and applying single-chip microcomputers has never diminished, especially the MCS51 series. This is determined by the characteristics of single-chip microcomputers. In fact, from the application of single-chip microcomputers/CPLDs to general digital integrated circuit systems to the widespread application of single-chip microcomputers, it is a qualitative leap in the level of intelligent application of electronic design in my country. According to statistical analysis, the sales volume of single-chip microcomputers/CPLDs has continued to increase year by year, and for a long time, single-chip microcomputers will still be the protagonist of electronic design (although this position has been challenged by CPLD).

1 Advantages and disadvantages of pure single-chip microcomputer system

① A large number of MCU/CPLD peripheral chips and interface circuits make the design of MCU application systems simple and quick. The launch of new MCUs and the support of high-level languages ​​(such as C51) further extend the life of MCUs.

② Long-term stable development makes the single-chip microcomputer very cost-effective, and the single-chip microcomputer/CPLD has accumulated a lot of information and has a large number of engineering and technical personnel. This is difficult for CPLD to achieve at present.

However, the shortcomings of the microcontroller are also obvious:

① Low speed. Even a high-speed MCU can only work at the μs level, which is determined by the serial working characteristics of the MCU.

② Low reliability. Although there are many devices and designs of MCU/CPLD that have solved some problems to a certain extent, such as the widespread use of watchdog, in some cases, a momentary reset can also cause serious consequences.

2 Advantages and Disadvantages of Pure CPLD Design

Even if the functions of a single-chip microcomputer/CPLD can be completed by a single-chip microcomputer structure, in some cases, it is better to use a pure digital circuit to complete them. The currently popular CPLD not only overcomes the shortcomings of single-chip microcomputers, but also can be programmed in VHDL language. Single-chip microcomputers/CPLDs further break the boundaries between software and hardware engineers, accelerate the product development process, and make the design of pure digital circuits simple. People are even discussing using C as the next generation of hardware description language.

No wonder some experts point out that the era of single-chip microcomputers in electronic design is about to pass, and EDA (electronic design automation) with PLD as the core will be the future design direction of single-chip microcomputers/CPLDs. Due to the development of ultra-large-scale integrated circuit technology, millions of gates can be integrated on a single-chip PLD chip. In terms of system scale, there is no problem in designing single-chip microcomputers. Programmable device manufacturers in the United States have provided assistance to designers in the form of soft-core and hard-core embedding (embedding single-chip microcomputer circuits into PLDs). It is only a matter of time before PLD devices replace single-chip microcomputers. However, in the current widespread application in my country, it is still a bit early to rely solely on PLD devices for the following reasons:

① Due to the history of single-chip microcomputers/CPLDs, most of the electronic designers in my country use MCS51 series single-chip microcomputers, and no company has been heard of providing soft-core or hard-core integration. It will take some time for so many people to switch to other series of single-chip microcomputers, and the original programs are even more reluctant to change.

② The price of MCU is low, but if PLD adds MCU core, the price will be more expensive, at least under the current situation.

Therefore, due to the complementarity of MCU and PLD, the structure of MCU plus PLD will be a better choice at least in the near future. The following introduces the characteristics and precautions of MCS51+EMP703S structure system through the example designed by the author.

3 MCU + CPLD structure system design example

This design is used for single chip microcomputer/CPLD automatic control, and the design requirements are shown in Figure 1.

For an engineer who is familiar with MCU system design, the above design will not be technically difficult. The problem is:

① Use two full-duplex serial ports;

② Requires more input and output ports. If the traditional design method is used, more chips will be used, and the design of the circuit board will be more complicated. Once the design is wrong, the entire circuit board must be redesigned, which is time-consuming, labor-intensive and costly. After adopting the MCS51+EMP7032S design, modular design is basically achieved, and the circuit modification is only programming. The time used from the beginning of design to finalization is basically the time for making circuit boards. Due to the design of output signal latch, the output jump caused by the microcontroller program running away and the watchdog reset is completely avoided. At this time, the equipment is completely crucial. Figure 2 is the design principle circuit diagram.

From the design schematic, we can see that the main part of the MCU/CPLD only needs two integrated circuits: MCU AT89C51 and CPLD-EPM7032S, and the circuit board adopts modular design, with expansion interfaces reserved. It only needs to be equipped with different processing modules to realize many functions such as data acquisition, keyboard scanning, display drive and relay control. The communication method similar to the SPI interface is adopted between the MCU and EPM7032S. As shown in Figure 2. This method not only realizes the communication between the MCU and CPLD, but also has flexibility and saves a lot of port resources.

EPM7032S has 36 I/O ports. Apart from the 7 ports used to communicate with the microcontroller, there are 29 ports available. This can meet most of the requirements for port expansion design. Figure 3 is a waveform simulation diagram of the test program written for EPM7032.

In Figure 3: CLK is the synchronous clock; SEND is data reception; END is the control end of the SEND signal; S is the bit selection end, which is used to control the serial communication port selection; RXD and TDX are the serial communication ports between the microcontroller and EPM7032; RXD1, TXD1, RXD2, and TDX2 are serial communication expansion ports. This solution has been tested many times and is very helpful for saving PCB board area and wiring difficulty, improving design reliability and improving design efficiency. [page]

MCU Program

sdosend:

setb clk

setb end

mov r7,#06h

ssend:

rc a

mov send,c

nop

nop

clr clk

nop

nop

setb clk

djnz r7,ssend

nop

nop

clr end

nop

nop

setb end

ret

VHDL language program

Library ieee;

Use ieee.STd_logic_1164.all;

Entity pldse1 is

Port

(

so,clk,send :in std_logic

);

end pldse1;

architecture io1 of pldse 1 is

begin

process(cs)

begin

if(cs=\'0\')then

casep qout is

when "000000"=>

when "000001"=>

when "000010"=>

·················

when "000100"=>

when "000101"=>

when others=>null;

end case;

else null;

end if;

end procESS;

process(clk)

begin

if(clk\'event and clk=\'0\')then

qout<=data &qout(5 downto 1)

else null;

end if;

end process;

end io 1;

Through the program MCU/CPLD, we can see that the control signal is sent using CLK and SEND lines; END is used as the end bit. No matter what the situation is, if there is no falling edge pulse of the end bit, the output port of the PLD will not change, which can ensure the stability of the output signal. This output latching ensures that the original output of the relay is not affected when the MCU is reset after a crash. After receiving the control signal of the MCU, the PLD first stores it temporarily until it receives the falling edge pulse of END, and then outputs the data and makes corresponding high and low level actions.

From the above design, we can see that the MCU and PLD are highly complementary in use: in terms of logic operation and intelligent control, the MCU has irreplaceable advantages; and in terms of high speed and stability, PLD is undoubtedly the first choice. Therefore, in the current electronic design, making full use of the MCU + PLD structure will achieve twice the result with half the effort.