0 Introduction
With the expansion of national industrial scale and the development of science and technology, the load structure of power grid has changed greatly. On the one hand, the massive growth of nonlinear, impact and unbalanced loads has deteriorated the power quality; on the other hand, with the development of information technology. More and more sensitive loads have higher and higher requirements for power quality. This requires power quality detection and analysis equipment to have the ability of real-time detection, rapid analysis and real-time display. The power quality analyzer designed with high-performance digital signal processor (DSP) and embedded computer system (ARM) dual processor architecture can meet the above requirements. The DSP system realizes real-time acquisition and processing of voltage and current signals, and obtains power quality parameters through windowed Fourier transform and wavelet algorithm; the ARM embedded platform runs WinCE operating system to complete human-computer interaction, data storage, real-time display and other functions. The system has established a good software and hardware platform for the scalability and intelligence of the instrument.
1 Hardware system design
The hardware system design of the portable power quality analyzer should be based on functional realization and portable design, and take into account the scalability of the system.
1.1 Overall design of the hardware system
The hardware system includes five modules: signal conditioning, data acquisition and processing, ARM embedded platform, co-controller and power system. The system framework is shown in Figure 1. The voltage and current signals of the power grid are pre-processed by the conditioning circuit; the DSP processor system realizes cache and fast and accurate analysis and calculation after digitization by high-speed ADC; the collected waveform data and analysis and calculation results are transmitted to the ARM embedded platform through FIFO; LCD is used to display waveforms and analysis results; SD card or USB storage device is used to store a large amount of data for playback or further in-depth analysis; keyboard or touch screen is used to realize human-computer interaction function; RS 232, USB and network interfaces are set to facilitate the systematization and networking expansion of the power quality analyzer.
The system uses CPLD chip to design a co-controller. Its main function is to generate the sampling clock required by the A/D converter, complete the timing control of the sampling channel, integrate the FIFO read clock logic, the network card address control logic and the DSP startup mode setting. The system hardware circuit is equipped with a variety of power supplies. The system low power consumption design is achieved by controlling the power supply of each module of the system and making the DSP work in power saving mode according to the measurement requirements. The system is battery-powered to meet the requirements of portable instruments. [page]
1.2 Data acquisition and processing module
The power quality analyzer needs to have a high measurement accuracy, and the grid voltage and current signals, in addition to the 50 Hz power frequency component, also contain high-frequency components caused by voltage transients, short-term voltage surges and sags, etc.; according to general grid test requirements, 8 signals (4 voltages and 4 currents) need to be detected; here a high-speed, high-resolution, multi-channel, low-power ADC chip is required. The AD7655 produced by TI is a low-cost, 4-channel, 1 MSPS sampling rate, 16-bit ADC chip. The typical power consumption of this chip is 120 mW, and it is only 2.6 mW when the sampling rate is 10 KSPS, which meets the low power consumption requirements of the system; there are two low-noise, wide-bandwidth sample-and-hold devices and corresponding analog switches in the chip, allowing two channels to be sampled simultaneously. The selection of two AD7655s can meet the system design requirements.
The digital signal processor uses the ADSP-21161N 32-bit floating-point DSP chip of ADI. The chip adopts a super Harvard structure, with multiple internal buses, high-speed computing units, large-capacity memory, and flexible and diverse external interfaces. Its core operating frequency can reach 100 MHz, the external bus operating frequency can reach 50 MHz, and the computing processing speed can reach 600 MIPS. It achieves higher processing capabilities at a lower operating frequency while reducing power consumption. The IDE environment tailored to the processor provided by ADI has greatly facilitated DSP software development and maximized the performance of the processor.
Two AD7655s are connected to the DSP through a "three-wire" SPI interface. The DSP caches the data and performs a series of operations, and sends the calculation results to the FIFO through the LINK PORTS interface to realize the data transmission function. The control logic such as the ADC sampling clock, channel switching in each ADC, and dual ADC scheduling is implemented by the co-controller.
1. 3 Co-controller
The logic circuit block diagram of the co-controller is shown in Figure 2. In Figure 2, the sampling clock generator provides the sampling clock for the A/D converter; the ADC channel rotation control circuit coordinates the data conversion order of the 8 channels to assist the DSP in accurately reading the voltage and current signals of each phase; the DSP startup mode control circuit assists the DSP power-on initialization program to self-start from the FLASH; the FIFO read clock logic circuit is controlled by the ARM embedded platform to generate the read clock and complete the data transmission between the DSP and the ARM system; the network card address control logic provides read and write logic for the CS8900 network card.
1.4 ARM embedded platform
The hardware configuration of the ARM embedded platform is shown in Figure 1. Samsung's S3C2410 chip is selected, with 64 MB SDRAM and 64 MB FLASH. The embedded platform has many peripheral interfaces: SPI interface is used for DSP command transmission; LCD interface is used to drive the TFT LCD screen; USB interface is suitable for a variety of plug-and-play devices; SD card interface can be inserted with a large-capacity SD card for data storage; touch screen interface can realize touch screen control. In order to realize the networking of the instrument, the system expands the network card chip CS890OA; for the security of system debugging, the RS 232 interface is isolated.
Communication and data transmission between ARM and DSP are realized through SPI interface and FIFO. ARM sends commands through the SPI interface to enable DSP to perform corresponding mathematical operations and transmit data. The system sets ARM as the master
device and DSP as the slave device. FIFO is used to transmit DSP calculation results and waveform data; the FIFO chip uses low-power asynchronous chip SN74ALVC7805, the data transmission rate can reach 50 MHz, and the data storage depth is 256 B.
The ARM embedded platform is transplanted with WinCE operating system. WinCE operating system has unique advantages in real-time management, graphical interface, development environment, etc., which provides convenience for human-computer interaction and network expansion of portable power quality analyzers. [page]
2 System software design
System software design includes WinCE operating system customization for ARM, application design and data processing program design for DSP.
2.1 WinCE operating system customization and application design
WinCE is a modular, multi-tasking, real-time embedded operating system. Microsoft provides powerful development tools. WinCE operating system customization includes operating system kernel customization and relevant driver programming. Its kernel customization uses PB (Platform Builder) software, and the corresponding driver development uses EVC (Embedded Visual C++).
The system application is a C# form application developed by VS 2005 (Visual Studio 2005) on WinCE5.0. Its main functions are: achieving a good human-machine interface, reasonable function settings, data reception, display and storage, and control of DSP and system power supply.
The interface of the power quality analyzer application is divided according to different measurement purposes, and is divided into oscilloscope, power and energy, harmonics, vector diagram, sudden rise and fall, flicker and transient display interfaces. Different display interfaces run different display threads, and each display thread has a corresponding data transmission mode. ARM sends commands to the DSP processor according to this data transmission mode, performs corresponding calculations and transmits corresponding data.
2.2 Data processing program design
The data processing program flow chart is shown in Figure 3. After the program is started, the DSP reads the ADC sampling data through the SetiaIs interrupt, and receives the SPI interrupt at the same time. According to the command of the ARM system, the corresponding power quality index calculation is performed, and the calculated data is transmitted to the FIFO through the Link Port for the ARM system to read; the IRQ0 interrupt is used to control the rhythm of data transmission and data synchronization.
2.3 Introduction to data processing algorithms
The power quality analyzer needs to perform steady-state analysis and transient analysis on the power signal. Steady-state analysis includes detecting the effective value of three-phase voltage and current, grid frequency, harmonics of voltage and current and total harmonic distortion rate, positive and negative sequence components in voltage and current; calculation of three-phase imbalance, etc. Transient signal analysis includes voltage transients, short-term voltage swells, sags, voltage flickers, short-term severe waveform distortion, etc. Compared with steady-state analysis, transient power quality analysis requires fast, real-time, and accurate measurement and analysis of signals.
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FFT transformation is an important tool for power quality analysis. In order to improve the calculation accuracy of FFT transformation, it is necessary to implement full-cycle sampling through hardware or software methods. Full-cycle sampling requires that the sampled data is exactly the entire cycle or multiple of the signal. That is, if the signal cycle is T, it is necessary to ensure that: N/fs=L×T, where L is an integer; fs is the sampling frequency; and N is the number of sampling points.In actual sampling, full-cycle sampling is usually not possible. Even if the signal cycle is known and synchronous sampling is adopted, only some frequencies in the signal (power frequency and its multiples) can be close to full-cycle sampling, but all frequency components in the signal (such as noise, etc.) cannot be full-cycle sampling. The direct consequence of non-integer-cycle sampling is spectrum leakage, which makes the obtained frequency components inaccurate; the second consequence is that for multi-frequency component signals with closely spaced frequencies, interference will occur.
In order to simplify the hardware design, this paper adopts non-integer-cycle sampling and reduces spectrum leakage and interference through windowed Fourier transform. The amplitude and phase of harmonics below 50 can be accurately calculated by windowed Fourier transform method. Further calculations from the harmonic analysis results can obtain basic electrical parameters such as the effective value, frequency, power, phase difference, distortion and imbalance of each phase of the three-phase system.
Differential operators can detect transients, and the Nth-order vanishing moment of the wavelet filter and the Nth-order convolution differential operator have an equivalent relationship. Based on this principle, a voltage transient detection algorithm based on wavelet transform is designed. In the detection of short-term voltage swells and sags and surge currents, a real-time true effective value calculation method is used, and the occurrence of an event is judged by comparing the effective value with the threshold. The evaluation of voltage flicker uses the synchronous detection method recommended by IEC, and the flicker measurement value is calibrated by IEC test data. The transient power quality analysis software designed on this hardware platform can realize the measurement of voltage transients, short-term voltage swells and sags, surge currents, harmonics, three-phase imbalance, voltage flicker and other items.
3 System test results
A Y-connection test system consisting of a Chroma 61702 power signal source and a three-phase AC motor was built to test the steady-state analysis function and transient analysis function of this detection system. Actual measurements show that the system has high measurement accuracy and can accurately measure the effective value of voltage and current, power energy value, up to 50 harmonic components, three-phase imbalance, short-term flicker value and long-term flicker value. All test indicators meet the design requirements.
The instrument can capture the real-time true effective value of the power grid and display the results, which is convenient for observers to detect power grid voltage events. At the same time, the instrument can capture voltage and current fluctuations and flickers, voltage drops and other events in real time, and store the events in the SD card for users to read at any time.
4 Conclusion
This paper designs a power quality analyzer from the perspective of portable instrument design. The instrument uses DSP to realize data acquisition and processing, quickly and accurately calculates various power quality indicators, and can perform steady-state analysis and transient analysis; uses ARM embedded platform to realize data management, human-machine interface and system control, combined with WinCE operating system, improves the reliability of the system, and provides a good platform for realizing the intelligentization and networking of power quality analyzers. Through actual tests, it is shown that all indicators of the instrument meet the IEc power quality measurement standards. By selecting low-power devices and adopting power supply control, low power consumption of the system is achieved; the system hardware design is simple and the integration is relatively high, realizing the portable design of the system.
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