LCD controller built into S3C44B0X and its application

introduction

The S3C44B0X microprocessor is a cost-effective and high-performance microcontroller solution provided by Samsung for handheld devices and general applications. It uses the ARM7TDMI core, operates at 66MHz, and integrates peripheral devices such as LCD controllers. Its LCD controller is versatile and can interface with most LCD display modules. The interface design and driver development are simple, and it is widely used in the display part of smart meters, PDAs, etc.

Introduction to built-in LCD controller

Overview

The function of the built-in LCD controller of S3C44B0X is to transfer the LCD data in the display buffer (in the system memory) to the external LCD driver and generate the necessary LCD control signals.

It supports grayscale LCD and color LCD. On grayscale LCD, using time-based dithering algorithm and FRC (Frame Rate Control) method, it can support grayscale LCD with monochrome, 4-level grayscale and 16-level grayscale modes. On color LCD, it can support 256 colors. LCDs of different sizes have different numbers of vertical and horizontal pixels, data interfaces, data widths, interface times and refresh rates. The LCD controller can be programmed to control the corresponding register values ​​to adapt to different LCD display panels.

LCD controller logic block diagram

Figure 1 is a logic block diagram of the LCD controller. From the block diagram, it can be seen that the LCD controller is used to transmit display data and generate necessary control signals, such as VFRAME, VLINE, VCLK, and VM. In addition to the control signals, there is also a data port VD[7:0] for display data.

The LCD controller includes REGBANK, LCDDMA, VIDPRCS and TIMEGEN. REGBANK has 18 programmable registers for configuring the LCD controller. LCDDMA is a dedicated DMA that can automatically transfer display data from the frame memory to the LCD driver. With the dedicated DMA, data can be displayed without CPU intervention. VIDPRCS receives data from LCDDMA and passes the corresponding format data through TIMEGEN (including programmable logic) to support the different interface time and rate requirements required by common LCD drivers. The TIMEGEN part generates signals such as VFRAME, VLINE, VCLK and VM.

The LCD controller provides the following external interface signals:

VFRAME: Frame synchronization signal between LCD controller and driver. Notify LCD screen of a new frame display. LCD controller sends VFRAME signal after a complete frame is displayed.

VLINE: A synchronous pulse signal between the LCD controller and the driver. The LCD driver uses it to display the contents of the horizontal shift register on the LCD screen. The LCD controller sends a VLINE signal after a whole line of data is transferred to the LCD driver.

VCLK: Pixel clock signal between LCD controller and driver.

VM: An AC signal used by the LCD driver. The driver uses VM to turn the row and column voltage polarity of the pixels on or off.

VD[3:0]: LCD pixel data output port.

VD[7:4]: LCD pixel data output port.

LCD Controller Registers

The LCD controller configures the size, display mode, interface data width, etc. of the LCD display module through 18 programmable registers.

LCD Control Register 1 (LCDCON1)

LCDCON1 address: 0x01F00000;

Attributes: R/W;

Reset value: 0x00000000.

The meaning of each bit in LCDCON1 is shown in Table 1:

LCD Control Register 2 (LCDCON2)

Address of LCDCON2: 0x01F00004;

Attributes: R/W;

Reset value: 0x00000000.

The meaning of each bit in LCDCON2 is shown in Table 2:

LCD Control Register 3 (LCDCON3)

&n bsp; LCDCON3 address: 0x01F00040;

Attributes: R/W;

Reset value: 0x00.

The meaning of each bit in LCDCON3 is shown in Table 3:

Frame buffer start address 1 (LCDSADDR1)

Address of LCDSADDR1: 0x01F00008;

Attributes: R/W;

Reset value: 0x000000.

The meaning of each bit in LCDSADDR1 is shown in Table 4:

Frame buffer start address 2 (LCDSADDR2)

The address of LCDSADDR2: 0x01F0000C;

Attributes: R/W;

Reset value: 0x000000.

The meaning of each bit in LCDSADDR2 is shown in Table 5:

Note: The user scrolls the screen by changing the values ​​of LCDBASEU and LCDBASEL, but the values ​​of LCDBASEU and LCDBASEL cannot be changed at the end of the frame, because the pre-fetching of the next frame takes precedence over changing the frame. If the frame is changed at this time, the pre-fetched data will be invalid and will not be displayed correctly. In order to check LINECNT, the interrupt should be masked, otherwise if any interrupt happens to execute after reading LINECNT, the value of LINECNT may be invalid due to the execution of the ISR.

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Buffer start address three (LCDSADDR3)

LCDSADDR3 address: 0x01F00010;

Attributes: R/W;

Reset value: 0x000000.

The meaning of each bit in LCDSADDR3 is shown in Table 6:

Note: PAGEWIDTH and OFFSIZE must be changed when ENVID=0.

Applications of built-in LCD controller

The LCD controller can interface with most LCD display modules, such as DMF50081, KCS057QV1AJ, etc. KCS057QV1AJ is a 320 240 pixel STN (super twisted nematic) 256 color LCD display module with CFL backlight produced by KYOCERA. It does not have an LCD controller and can be easily interfaced with the LCD controller built into the S3C44B0X. This section will detail its hardware interface connection with the LCD controller and its driver.

Interface Design between LCD Controller and KCS057QV1AJ

The external interface signal lines provided by KCS057QV1AJ are as follows:

FRM: Synchronous signal line for driver scanning;

LOAD: data latch signal line;

CP: data shift clock signal line;

DISP: display control signal line;

D[7:0]: 8 display data input lines.

When wiring between KCS057QV1AJ and LCD controller, FRM, LOAD, CP, D[7:0] of KCS057QV1AJ are connected to VFRAME, VLINE, VCLK, VD[7:0] of LCD controller respectively. DISP pin is connected to GPC15 of GPIO of S3C44B0X, and GPC15 is used to control the opening and closing of LCD display module. The specific wiring is shown in Figure 2.

KCS057QV1AJ driver development

The driver includes functions to initialize S3C44B0X Port D and Port C, functions to initialize LCD controller, functions to turn on and off LCD display module, functions to display stripes on LCD display module, all functions have detailed comments.

The functions to initialize port D and port C are as follows:

void Port_Init(void)

{

rPCONC=0x5f55ffff;/GPC15 is an output port, GPC4-GPC7 are assigned to LCD data lines VD7-VD4;

rPUPC=0x0;/All pins of port C are pulled up;

rPDATC=0x3fff; /All pins of port C are initialized to high level;

rPCOND=0xaaaa;/All pins of port D are assigned to LCD controller;

rPUPD=0x0;/All pins of port D are pulled up;

rPDATD=0xff;/All pins of port D are initialized to high level.

}

The initialization LCD controller function is as follows:

void LCD_Init()

{

int i;

U32 LCDBASEU,LCDBASEL,LCDBANK;

LCDDisplayOpen(FALSE);/Close LCD;

rLCDCON1=(0);/Turn off video output;

rLCDCON2=(239)|(119<<10)|(15<<21);

/Set the return time of row scan to 15 MCLK, and set the screen to color 320 240 dots;

LCDBANK=0xc000000>>22;/Set the location of the display buffer's first address in the system memory;

LCDBASEU=0x0;/Set the starting address of the buffer;

LCDBASEL=LCDBASEU+(160) 240;

rLCDSADDR1=(0x3<<27)|(LCDBANK<<21)|LCDBASEU;

/Set the display module to color mode, etc.;

rLCDSADDR2=(0<<29)|(0<<21)|LCDBASEL;

rLCDSADDR3=(320/2)|(0<<9);/Do not use virtual screen;

rREDLUT=0xfca86420;/Set the red lookup table register, which is related to specific display requirements;

rGREENLUT=0xfca86420;/Set the green lookup table register, which is related to specific display requirements;

rBLUELUT=0xfffffa50;/Set the blue lookup table register, which is related to specific display requirements;

rLCDCON1=LCDCON1_ENVID|0<<1|0<<2|0<<3|(2<<5)

|1<<7|(0x3<<8)|(0x3<<10)|(CLKVAL<<12);

/ Enable video output, 8-bit single scan mode, set WDLY, WLH, CLKVAL;

for(i=0;i<80*240;i++)/Display buffer is cleared.

*(pLCDBuffer16+i)=0x0;

}

As shown in Figure 2, GPC15 is used to turn on and off the LCD. The functions for turning on and off the LCD display module are as follows:

void LCDDisplayOpen(U8 isOpen)

{

if(isOpen){

rPDATC|=0x8000;/Turn on LCD

}

else{

rPDATC&=0x7fff;/Turn off LCD

}

}

The LCDBANK register has defined the display buffer in the system memory segment head address as 0xc000000. To display characters and pictures, you only need to send the character and picture modulo data to the buffer. However, it should be noted that the color LCD uses 8-bit data to represent one pixel. The buffer head address is defined as follows:

U32 pLCDBuffer16=(U32*)0xc000000;

Here is a program that displays light and dark stripes on the entire screen. The function for displaying light and dark stripes is as follows:

void LCDstripe ()

{

int i,lcddata;

for(i=0;i<(320*240)/4;i++)

{

lcddata0 = 0x0ffff0000;

*(pLCDBuffer16+i)=lcddata;/Send data to the frame buffer, 4 pixels at a time.

}