Design of multi-protocol reader/writer for RF card based on AVR microcontroller

introduction

Radio frequency identification (RFID) is an emerging technology that uses wireless methods to identify electronic data carriers (electronic tags). Compared with contact IC cards and barcode recognition systems, it has huge advantages. The use of radio frequency identification technology can effectively realize the intelligent management of large amounts of information distributed over a wide area, and achieve the purpose of efficient and fast operation. It has broad application prospects, especially in the second-generation ID card, logistics, transportation and shipping, automatic toll collection, supermarkets, access control system management, and service fields. With the rapid development of my country's national economy, the domestic RFID industry is also undergoing profound changes.

RFID system is generally composed of reader/writer, radio frequency card and application software, among which the design of reader/writer is crucial, which determines the stability and accuracy of the system.

In addition to requiring it to support a range of protocols, standards and transceivers, there may be other functional requirements for the reader, such as high performance, anti-collision, far/near sensing distance, mobility and power consumption.

This article explains how to use EM Microelectronic's EM4094 RFID base station reader (also known as reader chip, analog front-end module, base station chip, transceiver) to build a 13.56MHz universal RFID reader that supports multiple protocols or meets the above specific requirements.

Hardware structure analysis

The reader/writer is generally composed of a read/write base station and a microcontroller (single-chip microcomputer).

Basically, a base station reader (such as the EM4094) is responsible for encoding/decoding data for the RFID and driving the RFID reader antenna with appropriate power.

The base station itself is driven by a microcontroller, which is responsible for managing the frame decoding tasks of different protocols and the communication interface (serial interface, USB interface or Ethernet interface) with the PC or other background control devices.

Some IC vendors offer chips that integrate an analog front end and a microcontroller. In many cases, the microcontroller or integrated memory space is either excessive or insufficient, and separate modules allow manufacturers to choose the microcontroller and memory capacity that best suits their design requirements.

Software functional design requirements

The reader/writer needs to support all mandatory commands of ISO14443 Type A and B, Sony Felica and ISO15693 standards, and support all instruction sets of EM 13.56MHz transceiver IC. Different communication protocols and anti-collision protocols can be implemented. The types of cards that can be read and written are as follows:

• ISO 14443A&B:

MIFARE® Ultralight

MIFARE® Classic

MIFARE® DESFire

MIFARE® PROX

MIFARE® PRO

• lSO 15693

• ISO 18000-3

• INSIDE PicoTag

• HID iClass

• Tagsys C320

• eNFC

• MasterCard PayPass

• FeliCa

• KSW TempSens

• KSW VarioSens

Selection of read/write base station

At present, there are basically three commonly used 13.56MHz multi-protocol read-write base stations:

• Phlisps RC632

• TI's RI-6C-001

• EM4094 from EM

The chips of the three companies have their own characteristics. Taking all factors into consideration, EM4094 has a better price-performance ratio.

Overview of EM4094

EM4094 is an integrated transceiver chip that can be used to build an analog front-end module for RFID readers. The data transmission and receiving links of the chip allow the transmission and decoding of any communication protocol, so EM4094 supports all EM's 13.56MHz transceiver chips, ISO15693, ISO14443 A&B, and Sony Felica protocols. With proper settings, EM4094 can even communicate with NFC devices.

It has the following features:

•Compatible with ISO15693, ISO14443;

• Oscillator using 13.56MHz quartz with selectable transconductance;

•Use OOK antenna driver or ASK module with single antenna driver;

•High output power, 200mW high output power under 5V power supply;

• ASK modulation adjustable range from 7% to 30%;

•Antenna short circuit protection;

•Multiple receiver inputs for highly reliable communications;

•AM/PM demodulation with AGC signal amplifier;

• 848kHz BPSK internal demodulator (B type);

•Multiple subcarrier compatible reception (212kHz, 424kHz or 848kHz);

•Multiple subcarrier compatible decoding (Manchester, BPSK);

• Built-in receiving low-pass filter cut-off frequency can be detected between 400kHz and 1MHz;

• Built-in receiving high-pass filter cut-off frequency can be detected between 100kHz, 200kHz and 300kHz;

•Selectable receive gain;

•Optional serial interface to program select bits;

• 3-wire SPI controlled power reduction mode, controlling the power on/off status;

• Output power is 100mW (SO16 package), 200mW (SO20 package);

• Operating temperature range -40℃ to +85℃;

•Fully compatible with ISO15693 and ISO14443 protocols;

•Multiple receiving inputs, high communication reliability.

Microcontroller selection

What makes the EM4094 stand out from other RFID reader chips is that it allows the reader manufacturer to choose the microcontroller that best suits their processing and power requirements. An 8-bit microcontroller operating at 16MHz with 8 kB of program memory seems to be the most logical choice for implementing a reader, as it can implement all relevant standards and de facto standard protocols. For more demanding RFID reader applications, 16 kB of memory will provide greater programming freedom.

The EM4094 does not integrate any other frame decoders besides the BPSK protocol. An integrated 848kHz BPSK decoder removes the need for the microcontroller to perform this demanding ISO14443 Type B specific operation, allowing the reader manufacturer to choose a microcontroller with a better cost-effectiveness ratio.

EM4094's requirements for microcontrollers

EM4094-ISO15693 protocol requirements for microcontrollers

• ~3800 bytes of program FLASH memory;

• ~345 bytes of SRAM;

• 1 timer T1 with capture mode (ICP1 feature);

• 3 I/O interfaces (DOUT, DIN, DCLK);

• Watchdog (settable to 2.2s);

• 8MHz crystal;

• No external interruptions are allowed during RFID communication;

•Support ISO15693 optimized design.

EM4094-ISO14443 ABC protocol requirements for microcontrollers

• ~15k bytes of program FLASH memory;

• ~500B bytes of SRAM;

• 2 timers T1, T3 with capture mode;

• Watchdog (settable to 2.2s);

• 16MHz crystal oscillator;

• No external interruptions are allowed during RFID communication;

•Provide dedicated firmware to support ISO14443 A, B, C standards.

Advantages of AVR microcontrollers

ATMEL's AVR series of microcontrollers is an excellent RISC structure microcontroller series. Compared with MCS51, it has the following typical features:

• The machine cycle of AVR is 1 clock cycle and most instructions are single-cycle instructions, so the performance is close to 1MIPS per MHz clock;

• The program memory and data memory have separate buses. The program can be executed efficiently. The AVR working at 8MHz is equivalent to the MCS51 working at 224MHz.

• Built-in reprogrammable FLASH program memory and EEPROM data memory support in-system programming (ISP) of the microcontroller. In production, it can be assembled first and then programmed, thus shortening the process and saving the cost of purchasing a universal programmer, and the program can be easily upgraded or modified;

• Built-in power-on reset circuit and watchdog timer circuit improve product reliability while reducing circuit cost;

•Some AVR MCUs are pin-compatible with MCS51 series MCUs, such as AT90S1200/2313 for AT89C1051/2051, and AT90S4414/8515 for AT89C51/52. Therefore, one set of PCB boards can correspond to two sets of circuits, which increases the selectivity and flexibility of user stocking;

•The timer/counter function is greatly enhanced when the baud rate of serial communication occurs without occupying the timer.

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Hardware Design Considerations

Power Design

First, let's briefly discuss the power supply design of the EM4094. The chip has three different power supply pins, of which VDDA1 and VDDA2 are used to power the internal antenna drivers ANT1 and ANT2. Each driver can be powered independently. Since these two drivers may generate or synchronize large currents, it is recommended to connect a 3.3μF capacitor between the VDDA1 and VDDA2 pins to provide sufficient energy to the antenna. In addition, we also recommend connecting two capacitors with capacitance values ​​of 1nF and 100nF in parallel to the capacitor to decouple and filter the power supply.

The third power supply pin, VDD, is used to power all other internal modules. On this power supply line, engineers will have to insert two filter capacitors with capacitance values ​​of 1nF and 100nF respectively for the same reasons mentioned above. They are preferably ceramic capacitors made of dielectric materials such as COG and X7R, because such capacitors have small tolerances and high temperature stability. It is important here that the same voltage (3.3V or 5V) should be applied to these three power supply lines. These power supply lines should also be connected to the analog ground.

Oscillator Input

The external crystal connected to the OSCIN and OSCOUT pins provides a 13.56MHz signal, which is sent to the output of the antenna driver. Two NPO capacitors across the crystal oscillator are used to ensure the start-up and stability of the crystal oscillator. The NPO capacitor value is determined by the selectable transconductance of the EM4094 (selected by a register flag) and the crystal parameters.

Figure 1 Working principle diagram

Bandgap reference output (AGD)

The bandgap reference voltage is used as an analog reference voltage by different internal blocks. To ensure the stability and reliability of the card reader chip, it is very important to properly decouple the AGD voltage with a 1nF and 100nF capacitor. As mentioned earlier, we recommend using ceramic capacitors made of COG or X7R dielectric materials.

Antenna driver output

ANT1 and ANT2 are the two outputs of the antenna driver, which can be driven in phase or in reverse phase, making it possible to connect the reader antenna in different ways and produce four different power levels of antennas according to the selected structure. The EM4094 can also be used with a remote antenna, in which case the output impedance of the EM4094 must match the impedance of the communication line.

If a coaxial cable is used, the output impedance of the EM4094 will have to be adjusted between 10 ohms (ANT1 optional) and 50 ohms when only one antenna driver is used; when two antennas are used in parallel, the output impedance of the EM4094 will have to be adjusted between 5 ohms (ANT1 optional) and 50 ohms. To achieve a good impedance match, developers can use the Smith chart to choose to use an LC PI network and select appropriate component parameter values.

If the reader antenna can be integrated on the same PCB as the EM4094, you can use the direct antenna connection method (see Figure 2). In this case, the antenna and the series capacitor form an LC series loop. The resonant frequency of this loop is the reader frequency. The series resistor is used to suppress the quality factor and set the antenna current below the rated value of the EM4094. When the antenna operates at its resonant frequency, a directly connected antenna can achieve higher power. For different ways to connect the IC antenna, refer to the EM4094 application guide.

Figure 2 Pin Definition

Transceiver signal reception

RFIN1 and RFIN2 are two input pins on the IC receiving chain. They are used by EM4094 to demodulate the data stream sent by the transceiver. The voltage on the pins must be set between GND and VDD. The two demodulation inputs must have the same performance and show the same sensitivity. With an external matching impedance circuit, these two inputs can be used to demodulate the input phase or amplitude modulation signal. The unused input pin should be connected to the analog ground through a 10nF capacitor. The high sensitivity of the input pin allows the reader to have a long reading distance even at the minimum power level of the electronic tag.

Table 1

Turn off the card reader chip

The EN pin is used to enable or disable the reader IC. This input pin can be controlled by an external microcontroller. When the EN pin is high, the EM4094 enters active mode and its output generates a 13.56MHz signal on the antenna; when the EN pin is low, the reader chip enters sleep mode, which greatly reduces the power consumption of the reader chip. This performance of the EM4094 is particularly useful when designing a portable card reader, which can increase the battery life.

Data Input and Output

In SPI mode, the DIN pin is used to input data, the DOUT pin is used to output data, and DCLK is used as the SPI clock signal. An SPI interface can be used to set the internal bit registers of the card reader chip and set the parameters of different modules. In normal mode, the antenna driver is turned on or off by applying a logic level on the DIN pin, and the response information sent by DIN can be read directly on the DOUT pin.

Security Features

Many current RFID applications use encryption algorithms to encrypt data or prove identity. Some encryption algorithms are public, while others are not. Some vendors provide their unique encryption algorithms in source code or object code, or in other independent security elements (such as SIM cards). Of course, multiple options make the design very flexible. You can implement one or more algorithms in a traditional microcontroller or a secure controller, and another option is to build an interface with a separate element responsible for security operations. Of course, it is also possible to mix the two solutions. EM provides its proprietary encryption algorithm through the SIM card.

Firmware programming

Program hierarchy

The firmware structure is divided into several layers, each with a specific function:

• Level1 – performs decoding tasks;

• Level2 – performs low-level data transmission and transformation tasks;

• Level3 – performs upper-layer data transmission tasks --- main loop, bootloader and simcard;

• Level4 - performs UART communication tasks.

Main program design

• Main loop (level3) periodically polls the UART receive buffer (level4) and executes corresponding tasks according to valid commands. All executed tasks will return information, including task errors.

• UART data reception is performed asynchronously. The next command is executed only after the response to the previous command is completely sent.

•Usually the commands for communicating with the card are controlled by hardware timers (T0, T1, T2, T3 for receiving, T1 for sending).

•The timer count value is completed by the AVR clock signal.

•Some programs require interrupt triggers, which requires high capture capabilities.

•Like some other important tasks, sending (level2) and capturing (level1) tasks can be performed in parallel without interfering with each other.

Data processing

The application software prepares the command subsection for the Uplink (send) task. All tasks put the data bit stream to be sent into the data_buffer array. In order to separate the foreground capture program from the background processing, the capture task stores the information in a pair of arrays. [data bit, validity bit]. Through the level1/store_bit function, the pair of information obtained by the capture task is stored in the capture array indexed by the capture_cnt and capture_bit_count variables. The capture buffer must be initialized before performing the capture; the data bit is 0 and the valid bit is 1. All bits are valid. The received data can be searched in the background. This logic can give an orderly and deterministic message without the need for asynchronous processing or priority reentrant interrupt processing.

Conclusion

Radio frequency identification is a mainstream technology for automatic identification, with the characteristics of large amount of information, high efficiency, convenience and security. The research and development of low-cost and highly reliable electronic tag reading terminals has great practical significance. Based on the research and analysis of the working principle of the system, this paper gives a hardware implementation scheme of a complete radio frequency card reading and writing system composed of an AVR microprocessor chip and an RFID reading and writing base station. The system structure and cost are reasonable, and the reliability has been verified by experiments, which has good application value.