Embedded Development Learning (2)

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Basic concepts:

Memory:

SRAM static memory features: small capacity, high price, advantages: no software initialization required, can be used as soon as power is turned on.

DRAM dynamic memory Features: large capacity, low price, disadvantages: cannot be used after power-on, requires software initialization.

In single-chip microcomputers: the memory requirement is small, and the development should be as simple as possible, so it is suitable to use all SRAM.

Embedded systems: large memory requirements and no bootable media such as NorFlash. (between microcontrollers and PCs).

PC: It has a large memory requirement and complex software, and does not care about the initialization overhead of DRAM, so it is suitable to use DRAM entirely.

External storage:

NorFlash has small capacity and high price. It can be connected to the CPU bus and can be directly read by the CPU when powered on. Therefore, it is generally used for startup.

NandFlash (same as hard disk, large capacity, low price, disadvantages: cannot be accessed by bus, cannot be read directly by the CPU when powered on, requires the CPU to run some software first, and then read and write through the timing interface).

so

General PCs are composed of: a very small BIOS (NorFlash) + a very large hard disk (similar to NorFlash).

General microcontroller: very small capacity NorFlash + very small capacity SRAM.

Embedded systems: Because NorFlash is very expensive, current embedded systems do not tend to use NorFlash, and directly use: external large-capacity NandFlash + external large-capacity DRAM + Soc built-in SRAM.

S5PV210 startup process:

The booting method of S5PV210: external large-capacity NandFlash + external large-capacity DRAM + Soc built-in SRAM.

In fact, booting is even more complicated. The 210 has a built-in 96kb SRAM (called iRAM) and a built-in 64kb NorFlash (iROM).

Step 1: After the CPU is powered on, it reads the preset code (BL0) from the internal IROM and executes it. This IROM code does some basic initialization (CPU always, watchdog...) (This IROM code is set by Samsung before leaving the factory. Samsung does not know what kind of DRAM will be connected to our board in the future, so this code is not responsible for initializing the external DRAM, so this code can only initialize things inside the SoC); then this code will determine the boot mode we choose (we can set the hardware switch to change the boot mode of the board) and then read the corresponding first part (BL1, 16kb) of the boot code (uboot) from the external memory to the built-in SRAM (iRAM).

Step 2: Run the code read from the previous step from iRAM (BL1 16kb), BL1 is responsible for initializing NandFlash, and then read BL2 to iRAM (the remaining 80kb)

Step 3: Run BL2 from iRAM, BL2 initializes DRAM (SDRAM), then reads OS into DRAM (SDRAM), then starts OS, and the boot process ends.

The following is a detailed startup process flow chart:

After cup is powered on, it starts from Samsung's built-in IROM and determines the selected boot mode:

1. If SD boot is selected, try to boot from SD channel 0 (built-in 4GiNAMD card) first. If channel 0 fails to boot, try to boot from channel 2. If channel 2 fails to boot, the entire boot fails completely.

2. If USB boot is selected, read the USB interface code.


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