9. Mixed programming of ARM assembly and C

9.1 Mixed programming of ARM assembly and C

9.1.1 Embedded assembly __asm

__asm("command")

For example, turn off/on the general interrupt switch CPSR

__asm ​​//Use variable names in C instead of registers

{

    MOV was,x

    ADD y,var,x/y

}

Register names in inline assembly language are treated by the compiler as variables in C or C++ language, so register names appearing in inline assembly do not necessarily correspond to physical registers with the same name.

These register names must be declared before use, otherwise the compiler will prompt a warning message

9.1.2 Assembly access to global variables in C

【1】Use IMPORT to declare global variables

【2】Use LDR to get its address

AREA globals， CODE， READONLY

EXPORT asmadd

IMPORT gvar; declare external variable gvar

asmadd

LDR R1, =gvar; load variable address

LDR R0, [R1]; read data

ADD R0, R0, #1; add 1 operation

STR R0, [R1]; save variable value

MOV PC, LR

END

9.1.3 ATPS（ARM-Thumb Produce Call Standard）

ATPCS (ARM-Thumb Produce Call Standard): Basic rules for subroutine calls in ARM programs and Thumb programs

Rules for using registers during subroutine calls

Use R0-R3 to pass parameters, and R4-R11 to save local variables.

Data stack usage rules

The stack uses full decrementing (FD). When there are more than 4 parameters, the excess part uses the stack to transfer parameters, and the return value is stored in R0.

9.2 ARM assembly THUMB2 instruction set

9.2.1 ARM THUMB THUMB2

ARM instructions: 32-bit, supports all functions, all instructions can be executed conditionally

THUMB: 16 bits, cannot access coprocessors, privileged instructions and special function instructions, only B instructions can be executed conditionally

THUMB2: Thumb-2 is a superset of the 16-bit Thumb instruction set. The instructions are 32-bit or 16-bit. It is different from the ARM instruction 32-bit encoding format. It is up to the assembler to decide whether to use 16-bit instructions or 32-bit instructions.

9.2.2 ARMV8 (64bit architecture)

ARMv8 provides two Execution States, AArch32state and AArch64 state, and no longer distinguishes between ARM state and THUMB state.

In the AArch32 state, two instruction sets A32 (32bit) and T32 (16/32bit) are provided. The two instructions are switched through BX.

In the AArch64 state, only the A64 instruction set is supported, and the fixed length is 32bit.

ARMV8 provides different run levels: Exception Level and Security (EL0(app), EL1, EL2, EL3), analogous to X86's Ring0-ring3(app)

9.2.3 CORTEX-M3

Cortex-M3 only supports Thumb-2 instructions. The Thumb-2 instruction set will be explained in detail in the STM32 microcontroller course.