;================================================
SDATA_595 EQU P1.0; Serial data input
SCLK_595 EQU P1.1; shift clock pulse
RCK_595 EQU P1.2; Output latch control pulse
;================================================
ORG 0000H
LJMP MAIN
ORG 0030H
;================================================
MAIN:
MOV SP,#60H
MOV R0,#0FEH
MAIN1:
CALL OUT_595
CALL DELAY
MOV A,R0
RL A
MOV R0,A
JMP MAIN1
;---------------------------------------------------------------
;Output latch output data subroutine
;---------------------------------------------------------------
OUT_595:
LCALL WR_595
CLR RCK_595
NOP
NOP
SETB RCK_595; rising edge sends data to output latch
NOP
NOP
NOP
CLR RCK_595
RIGHT
;--------------------------------------------------------------
;Shift register receiving data subroutine
;--------------------------------------------------------------
WR_595:
MOV R4,#08H
MOV A,R0
WR_LOOP:
RLC A
MOV SDATA_595,C
SETB SCLK_595; Shift occurs on rising edge
NOP
NOP
CLR SCLK_595
DJNZ R4,WR_LOOP
RIGHT
;--------------------------------------------------------------
;Delay subroutine
;--------------------------------------------------------------
DELAY:
MOV R5,#03H
DEL0:
MOV R6,#0FFH
PART 1:
MOV R7,#0FFH
DJNZ R7,$
DJNZ R6,DEL1
DJNZ R5,DEL0
RIGHT
;---------------------------------------------------------------
END
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