7.STC15W408AS MCU serial communication

STC15W408AS has only one serial port, serial port 1, which has four working modes, two of which have variable baud rates and the other two are fixed for selection in different applications.

1. Serial port 1 related registers

Below I will only explain the registers and register bits that I will need next.

1.1 Control Register SCON

Among them, SM0 and SM1 determine the working mode of serial port 1 according to the following combination:

REN: Enable/disable serial reception control bit. Software sets REN, i.e. REN=1 to enable serial reception, which can start the serial receiver RxD and start receiving information. Software resets REN, i.e. REN=0, to disable reception.

TI: Transmit interrupt request flag. In mode 0, when the 8th bit of serial data transmission ends, it is automatically set by internal hardware, that is, TI=1, to request an interrupt from the host. After responding to the interrupt, TI must be cleared by software, that is, TI=0. In other modes, it is set by internal hardware when the stop bit starts to be sent, that is, TI=1, and after responding to the interrupt, TI must be cleared by software.

RI: Receive interrupt request flag. In mode 0, when the serial receives the 8th bit, the internal hardware automatically sets RI=1 to request an interrupt from the host. After responding to the interrupt, RI must be cleared by software, that is, RI=0. In other modes, the internal hardware sets RI=1 at the middle moment of receiving the stop bit, and sends an interrupt request to the CPU. After responding to the interrupt, RI must be cleared by software. Interrupt request for serial communication: When a frame is sent, the internal hardware automatically sets TI, that is, TI=1, to request interrupt processing; when a frame of information is received, the internal hardware automatically sets RI, that is, RI=1, to request interrupt processing. Since TI and RI request an interrupt from the host in an "OR logic" relationship, the host does not know in advance whether it is an interrupt requested by TI or RI when responding to the interrupt. It must query TI and RI in the interrupt service program to distinguish and then process them separately. Therefore, both interrupt request flags cannot be automatically set by hardware and must be cleared by software, otherwise an error of multiple responses to one request will occur. SMOD/PCON.7 in the power control register PCON is used to set whether the baud rate of mode 1, mode 2, and mode 3 is doubled.

1.2 Data Buffer Register SBUF

The address of the serial port 1 buffer register (SBUF) of the STC15 series microcontroller is 99H, which is actually 2 buffers. The operation of writing SBUF completes the loading of the data to be sent, and the operation of reading SBUF can obtain the received data. The two operations correspond to two different registers, one is a write-only register and the other is a read-only register. There is a data register in the serial channel. In all serial communication modes, under the control of the write SBUF signal (MOV SBUF, A), the data is loaded into the same 9-bit shift register, the first 8 bits are the data byte, and the lowest bit is the output bit of the shift register. According to different working modes, the value of 1" TB8 will be automatically loaded into the 9th bit of the shift register and sent. The receiving register of the serial channel is an input shift register. Its word length is 8 bits in mode 0 and 9 bits in other modes. When a frame is received, the data byte in the shift register is loaded into the serial data buffer SBUF, and its 9th bit is loaded into the RB8 bit in the SCON register. If the received data is invalid due to SM2, the contents in RB8 and SBUF remain unchanged. Since the input shift register and SBUF buffer are provided in the receiving channel, after a frame is received and the data is loaded from the shift register into SBUF, the next frame of information can be received immediately. The host should take the data from the SBUF buffer before the end of the frame reception, otherwise the previous frame of data will be lost. SBUF is sent to the internal data bus in parallel.

1.3 Auxiliary Register AUXR

T0x12: Timer 0 speed control bit

        0, Timer 0 is the traditional 8051 speed, divided by 12;

        1. Timer 0 is 12 times faster than the traditional 8051, without frequency division

T1x12: Timer 1 speed control bit

        0, Timer 1 is the traditional 8051 speed, divided by 12;

        1. Timer 1 is 12 times faster than the traditional 8051, without frequency division

If UART1/serial port 1 uses T1 as the baud rate generator, T1x12 determines whether UART1/serial port is 12T or 1T

UART_M0x6: Communication speed setting bit for serial port mode 0

        0, the speed of serial port 1 mode 0 is the speed of the traditional 8051 microcontroller serial port, divided by 12;

        1. The speed of serial port 1 mode 0 is 6 times that of the traditional 8051 microcontroller serial port, divided by 2

T2R: Timer 2 enable control bit

        0, do not allow timer 2 to run;

        1, Allow timer 2 to run

T2_C/T: Control timer 2 as a timer or counter

        0, used as a timer (counting the internal system clock);

        1. Used as a counter (to count external pulses on pin T2/P3.1)

T2x12: Timer 2 speed control bit

        0, Timer 2 is the traditional 8051 speed, divided by 12;

        1. Timer 2 is 12 times faster than the traditional 8051, without frequency division

If serial port 1 or serial port 2 uses T2 as the baud rate generator, T2x12 determines whether serial port 1 or serial port 2 is 12T or 1T.

EXTRAM: Internal/external RAM access control bit

        0, allows the use of extended RAM that is logically off-chip and physically on-chip;

        1. Do not use extended RAM that is logically off-chip but physically on-chip

S1ST2: Serial port 1 (UART1) selects timer 2 as the control bit of the baud rate generator

        0, select timer 1 as the baud rate generator for serial port 1 (UART1);

        1. Select Timer 2 as the baud rate generator of serial port 1 (UART1). At this time, Timer 1 is released and can be used as an independent timer. Serial port 1 can select Timer 1 as the baud rate generator, or Timer 2 as the baud rate generator. When the S1ST2 bit (serial port baud rate selection bit) in the AUXR register is set to 1, serial port 1 selects Timer 2 as the baud rate generator. At this time, Timer 1 can be released and used as a timer/counter/clock output.

        For STC15 series MCU, serial port 2 can only use timer 2 as its baud rate generator, and cannot select other timers as baud rate generators. Serial port 1 selects timer 2 as its baud rate generator by default, and can also select timer 1 as its baud rate generator; serial port 3 selects timer 2 as its baud rate generator by default, and can also select timer 3 as its baud rate generator; serial port 4 selects timer 2 as its baud rate generator by default, and can also select timer 4 as its baud rate generator.

1.4 Timer 2 registers T2H, T2L

Timer 2 register T2H (address D6H, reset value 00H) and register T2L (address D7H, reset value 00H) are used to save the reload time constant.

Note: For STC15, serial port 2 can only use timer 2 as its baud rate generator, and other timers cannot be selected as baud rate generators; serial port 1 selects timer 2 as its baud rate generator by default, and timer 1 can also be selected as its baud rate generator; serial port 3 selects timer 2 as its baud rate generator by default, and timer 3 can also be selected as its baud rate generator; serial port 4 selects timer 2 as its baud rate generator by default, and timer 4 can also be selected as its baud rate generator.

1.5 Register bits ES and PS related to serial port 1 interrupt

The serial port interrupt enable bit ES is located in the interrupt enable register IE. The format of the interrupt enable register is as follows:

IE : Interrupt Enable Register (bit addressable)

EA: CPU's total interrupt enable control bit

        EA=1, CPU opens interrupts,

        EA=0, CPU blocks all interrupt requests.

The role of EA is to allow interrupts to form multi-level control. That is, each interrupt source is first controlled by EA; secondly, it is also controlled by each interrupt source itself.

Interrupt enable control bit control.

ES: Serial port interrupt enable bit

        ES=1, enable serial port interrupt,

        ES=0, disable serial port interrupt.

IP : Interrupt Priority Control Register Low (bit addressable)

PS: Serial port 1 interrupt priority control bit.

When PS=0, the serial port 1 interrupt is the lowest priority interrupt (priority 0)

When PS=1, the serial port 1 interrupt is the highest priority interrupt (priority 1)

2. Serial port 1 working mode 1: 8-bit UART, variable baud rate

When the software sets SM0 and SM1 of SCON to "01", the serial port 1 works in mode 1. This mode is an 8-bit UART format, and a frame of information is 10 bits: 1 start bit, 8 data bits (low bit first) and 1 stop bit. The baud rate is variable and can be set as needed. TxD/P3.1 is for sending information, RxD/P3.0 is for receiving information at the receiving end, and the serial port is full-duplex receiving/transmitting. The sending process of serial port mode 1: When sending in serial communication mode, data is output by the serial sending end TxD. When the host executes a "write SBUF" instruction, the serial communication transmission is started. The "SBUF" signal also loads "1" into the 9th bit of the transmit shift register and notifies the TX control unit to start sending. The timing of sending each bit is synchronized by the 16-division counter. The shift register continuously shifts the data to the right and sends it to the TxD port, and continuously shifts "0" to the left of the data for supplement. When the highest bit of the data moves to the output position of the shift register, it is followed by the 9th bit 1", and all bits on its left are "0". This condition causes the TX control unit to make the last shift output, and then invalidates the send enable signal SEND", completing the transmission of a frame of information, and setting the interrupt request bit TI, that is, TI=1, to request interrupt processing from the host.