ARM processor startup process
S3C2440 supports the following boot modes:
1. NorFlash boot
2. NandFlash boot 
When the processor is powered on, it will automatically fetch the first instruction from address 0 to start running. The left side shows the address layout when NorFlash boot is selected, and the right side shows the address layout when NandFlash boot is selected.
NandFlash does not participate in unified addressing like NorFlash, and the CPU cannot directly access its content. When NandFlash is in boot mode, address 0 is the Boot SRAM on-chip RAM size of 4KB, which is also called stepping stone. After the CPU is powered on, the first instruction is obtained from the stepping stone. The CPU will copy the front 4KB content of NandFlash to the stepping stone in advance (automatically completed by hardware). The CPU indirectly runs the front 4KB content of NandFlash, but the bootloader is more than 4KB, so the rest must rely on the stepping stone to copy it to the memory, and then jump to the memory to continue running.
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/* Description of Parameters
CoDstWidth: Destination Width of Codec Path
CoDstHeight: Destination Height of Codec Path
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PrDst
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